Semiconductor device and method for pattern layout for the same using total size of transistors

Abstract

A semiconductor device has an N-channel output transistor N1 including a first gate electrode GP11A formed to surround contact holes C11 in a drain region of the output transistor for contacting a first wiring M11. An N-channel protective transistor N2 including a second gate electrode GP12A formed to surround contact holes C12 in a drain region for contacting a second wiring M12. The interval of the contact holes C11 is greater than the interval of contact holes C2 in a source region of each the transistors. By changing the number of the contact holes C11, C12 surrounded by the gate electrodes GP11A and GP12A, the size of each of the N-channel output transistor N1 and N-channel protective transistor N2 is changed.

Dependencies are inferred from the claim text.