Integrated thermal architecture for thermal management of high power electronics

A thermal energy management architecture for a functioning system of electronic components and subsystems comprising:

• a first level of heat transfer devices comprising means for thermal energy spreading that include self-contained means for driving a thermal energy spreading mechanism and are operatively engaged with at least one semiconductor chip;
• a second level of heat transfer devices comprising means for thermal energy spreading that include self-contained means for driving a thermal energy spreading mechanism and are operatively engaged with at least one semiconductor chip package;
• a third level of heat transfer devices comprising means for busing thermal energy that include self-contained means for driving a thermal energy busing mechanism, and are operatively engaged with at least one of said first level and said second level means for thermal energy spreading;
• and
• a fourth level of heat transfer devices comprising means for busing thermal energy that include self-contained means for driving a thermal energy busing mechanism, and are operatively engaged with at least one of said first level means, said second level means, and said third level means.

A thermal energy management architecture for a functioning system of electronic components and subsystems comprising:

• a first level of heat transfer devices comprising means for thermal energy spreading that are substantially thermally driven and operatively engaged with at least one semiconductor chip;
• a second level of heat transfer devices comprising means for thermal energy spreading that are substantially thermally driven and operatively engaged with at least one semiconductor chip package;
• a third level of heat transfer devices comprising means for busing thermal energy that are substantially thermally and operatively engaged with at least one of said first level and said second level means for thermal energy spreading;
• and
• a fourth level of heat transfer devices comprising means for busing thermal energy that are substantially thermally driven and operatively engaged with at least one of said first level means, said second level means, and said third level means.

A thermal energy management architecture for a functioning system of electronic components and subsystems comprising:

• a first level of heat transfer devices comprising means for thermal energy spreading that are substantially thermally driven or include self-contained means for driving a thermal energy spreading mechanism, and are operatively engaged with at least one semiconductor chip;
• a second level of heat transfer devices comprising means for thermal energy spreading that are substantially thermally driven or include self-contained means for driving a thermal energy spreading mechanism, and are operatively engaged with at least one semiconductor chip package;
• a third level of heat transfer devices comprising means for busing thermal energy that are substantially thermally driven or include self-contained means for driving a thermal energy busing mechanism, and are operatively engaged with at least one of said first level and said second level means for thermal energy spreading;
• and
• a fourth level of heat transfer devices comprising means for busing thermal energy that are either substantially thermally driven or include self-contained means for driving a thermal energy busing mechanism, and are operatively engaged with at least one of said first level means, said second level means, and said third level means.