Low dielectric constant etch stop layers in integrated circuit interconnects
AssigneeAdvanced Micro Devices, Inc.
InventorsMinh Van Ngo, Dawn M. Hopper, Robert A. Huertas, Terri J. Kitson
Life of this patent
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Abstract
An integrated circuit and method of manufacture therefore is provided having a semiconductor substrate with a semiconductor device with a dielectric layer over the semiconductor substrate. A conductor core fills the opening in the dielectric layer. An etch stop layer with a dielectric constant below 5.5 is formed over the first dielectric layer and conductor core. A second dielectric layer over the etch stop layer has an opening provided to the conductor core. A second conductor core fills the second opening and is connected to the first conductor core.
Claims10
An integrated circuit comprising:
- a semiconductor substrate having a semiconductor device provided thereon;
- a first dielectric layer formed over the semiconductor substrate having a first opening provided therein;
- a first conductor core filling the first opening and connected to the semiconductor device;
- an etch stop layer of silicon nitride formed over the first dielectric layer and the first conductor core, the etch stop layer having a dielectric constant below 5.5;
- a second dielectric layer formed over the etch stop layer and having a second opening provided therein open to the first conductor core;
- a second conductor core filling the second opening and connected to the first conductor core.
An integrated circuit comprising:
- a semiconductor substrate having a semiconductor device provided thereon;
- a first dielectric layer formed over the semiconductor substrate having a first opening provided therein;
- a first conductor core filling the first opening and connected to the semiconductor device;
- a via etch stop layer of silicon nitride formed over the first dielectric layer and the first conductor core, the via etch stop layer having a dielectric constant below 5.5;
- a via dielectric layer formed over the via etch stop layer and having a via opening provided therein open to the first conductor core;
- a channel etch stop layer of silicon nitride formed over the via dielectric layer, the channel etch stop layer having a dielectric constant below 5.5;
- a second dielectric layer formed over the via dielectric layer and having a second opening provided therein open to the via opening;
- and
- a second conductor core filling the via and second openings and connected to the first conductor core.
Dependencies are inferred from the claim text.