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US 6,388,288 B1Granted
Integrating dual supply voltages using a single extra mask level
AssigneeTexas Instruments Incorporated
InventorsKarthik Vasanth, Sharad Saxena, Richard G. Burch, Purnendu K. Mozumder, Joseph C. Davis, Chenjing L. Fernando, Suraj Rao
Life of this patent
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Abstract
Integration of dual voltages on a single chip can be accomplished with a minimum of extra masks by optimizing only the MDD implant of the peripheral transistors, while other implants remain the same for both transistor types. This meets lifetime specifications without unnecessary expense.
Claims18
An integrated circuit device structure, comprising:
- a first transistor of a first conductivity type operable at a first predetermined supply voltage;
- a second transistor of said first conductivity type operable at a second predetermined supply voltage different from said first predetermined supply voltage;
- said first transistor and said second transistor having source dopant diffusions, drain dopant diffusions and drain extension dopant diffusions;
- said source and drain dopant diffusions of said first transistor and said second transistor being substantially identical and said drain extension dopant diffusion of said first transistor being different from said drain extension dopant diffusion of said second transistor.
1 more element
Dependencies are inferred from the claim text.