Method for making a semiconductor device having a low-k dielectric layer

A method of forming a semiconductor device that has a dual damascene interconnect comprising:

• forming on a substrate a first insulating layer, which includes a carbon doped oxide;
• forming on the surface of the first insulating layer a second insulating layer comprising silicon dioxide;
• forming a third insulating layer, which includes a carbon doped oxide, on the surface of the second insulating layer;
• forming on the surface of the third insulating layer a fourth insulating layer comprising silicon dioxide;
• etching a via through the first, second, third and fourth insulating layers;
• forming a trench on top of the via and on top of the fourth insulating layer;
• and then
• filling the via and trench with a conductive material.

A method of forming a semiconductor device that has a dual damascene interconnect comprising:

• forming on a substrate a first insulating layer, which has a relatively low dielectric constant and relatively poor mechanical strength, that is between about 150 and about 1,500 nanometers thick;
• forming on the surface of the first insulating layer a second insulating layer, which has a relatively high dielectric constant and superior mechanical strength, that is between about 2 and about 100 nanometers thick;
• forming on the surface of the second insulating layer a third insulating layer, which has a relatively low dielectric constant and relatively poor mechanical strength, that is between about 150 and about 1,500 nanometers thick;
• forming on the surface of the third insulating layer a fourth insulating layer, which has a relatively high dielectric constant and superior mechanical strength, that is between about 2 and about 100 nanometers thick;
• etching a via through the first, second, third and fourth insulating layers;
• forming a trench on top of the via and on top of the fourth insulating layer;
• and then
• filling the via and trench with a conductive material.