Method and system for analyzing wafer processing order

Abstract

A computer analyzes a process for fabricating a plurality of semiconductor wafers. The process has a plurality of processing steps, performed on various fabrication machines. The program is knowledge based, and is trained using training data, which may be generated by a simulator. A decision tree is generated, based on the training data. A plurality of input data representing characteristics of the semiconductor wafers are extracted. A first order pattern in any of the processing steps is identified using a decision tree, based on the input data. A plurality of probability distribution functions are formed for each characteristic. Each distribution function identifies a probability that a particular type of order pattern is present. A threshold is based on the plurality of probability distribution functions. A second order pattern in any of the processing steps is identified by comparing the data representing characteristics to the threshold. A third order pattern in any one of the processing steps is identified based on a calculated distance from a centroid computed from the data representing characteristics. One of the first, second, and third order patterns is selected, and one of the processing steps is identified as being associated with the selected order pattern. A problem in one of the plurality of machines is identified, based on a type of problem associated with the selected order pattern.

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