Fet with ferroelectric gate

Abstract

A dummy gate electrode is formed just above a channel formation region of a semiconductor substrate by patterning a dummy gate electrode material which is formed on the semiconductor substrate. A dopant is ion-implanted into a surface portion of the semiconductor substrate with the dummy gate electrode used as a mask. Thereby, a source/drain region is formed in self alignment to the dummy gate electrode. A first interlayer insulator is overall formed on the substrate and the dummy gate electrode, and thereafter the first interlayer insulator is subjected to a planarization process to expose a top surface of the dummy gate electrode. A trench is formed on the semiconductor substrate by removing the dummy gate electrode. A gate is made in the trench by forming a buffer dielectric film, a ferroelectric film and a gate electrode material sequentially in this order. Thus, the gate is formed without introduction of any damage in peripheral portions of the trench and without decrease of vertical components of spontaneous polarization in the ferroelectric film.

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