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US 6,334,206 B1Granted
Forgery prevention microcontroller circuit
AssigneeU.S. Philips Corporation
InventorThomas Wille
Life of this patent
Estimating the term…
Abstract
The invention relates to a microcontroller circuit, comprising circuit elements arranged on a semiconductor body. In order to make a tentative forgery of such a microcontroller circuit at least more difficult, at least a number of the co-operating circuit elements is provided on the semiconductor body in an irregularly scrambled spatial configuration.
Claims12
A microcontroller circuit, comprising:
- a central processor unit and at least one storage unit arranged on a semiconductor body, wherein the central processor unit and the at least one storage unit are interconnected and are characterized in that the processor and the at least one storage unit on the semiconductor are arranged in an irregularly scrambled spatial configuration, wherein the configuration of the microcontroller circuit prevents forgery by topography recognition.
An electronic circuit comprised on a semiconductor integrated circuit body, said electronic circuit comprising:
- a plurality of functionally distinguishable circuit elements comprising a central processor unit and at least one storage unit, co-operating with each other through interface circuits, at least a subset of said interface circuits being subdivided into interface sub-circuits located at predetermined, physically distinguishable locations on said semiconductor body, said subdivisions into interface sub-circuits being such that pairs of cooperating interface sub-circuits on pairs of functionally distinguishable circuit elements of said plurality of functionally distinguishable circuit elements are irregularly physically scattered on said semiconductor integrated circuit body, wherein the electronic circuit prevents forgery by topography recognition.
Dependencies are inferred from the claim text.