Semiconductor device for suppressing current peak flowing to/from an external power supply

A semiconductor device comprising:

• a booster circuit for generating an internal power supply voltage;
• and
• a chip internal circuit applied with the internal power supply voltage obtained in said booster circuit,
• wherein said booster circuit includes a first circuit, which is a constant current source, connected at one end to an external ground terminal and a second circuit connected between another end of said first circuit and said internal circuit, a capacitor connected to a connection node of said first circuit and said second circuit and to a power supply node of said chip internal circuit, and a switching transistor connected between said external ground terminal and the connection node of said first circuit and second circuit.

A semiconductor device comprising;

• a voltage-down circuit for generating a first internal power supply voltage (Vint1) obtained by lowering an external power supply voltage (Vcc) in a chip;
• a booster circuit for generating a second internal power supply voltage (Vint2) obtained by raising an external ground voltage (Vss) in a chip;
• and
• a chip internal circuit applied with the internal power supply voltage (Vint1, Vint2) obtained in said voltage-down circuit and said booster circuit,
• wherein said voltage-down circuit includes a first circuit connected at one end to an external power supply and a second circuit connected between the other end of said first circuit and said internal circuit for generating the first internal power supply voltage (Vint1), and a first capacitor connected to a first connection node of said first circuit and said second circuit,
• wherein said booster circuit includes a third circuit connected at one end to an external ground terminal and a fourth circuit connected between the other end of said third circuit and said internal circuit for generating the internal power supply voltage (Vint2), and another node of said first capacitor is connected to a second connection node of said third circuit and said fourth circuit, and wherein
• said first circuit is a circuit for supplying a first current in which a maximum current is smaller than a maximum current of a current flowing in said internal circuit, and
• said third circuit is a circuit for supplying a second current in which a maximum circuit thereof is smaller than the maximum current of the current flowing in said internal circuit.

A semiconductor device comprising:

• a voltage-down circuit for generating an internal power supply voltage obtained by lowering an external power supply voltage in a chip;
• and
• a chip internal circuit applied with the internal power supply voltage obtained in said voltage-down circuit,
• wherein said voltage-down circuit includes a first circuit connected at one end to an external power supply and a second circuit connected between the other end of said first circuit and said internal circuit for generating the internal power supply voltage, and a capacitor connected to a connection node of said first circuit and said second circuit and to a ground node of said chip internal circuit,
• wherein said capacitor is charged by said first circuit when a first current flowing in said second circuit is smaller than a preset value and supplies a discharge current to said second circuit when the first current flowing in said second circuit is larger than the preset value, and
• wherein said first circuit is a circuit for supplying a second current with a first variation rate with time which is smaller than a second variation rate of a third current flowing in said internal circuit with time.

A semiconductor device comprising:

• a booster circuit for generating an internal power supply voltage;
• and
• a chip internal circuit applied with the internal power supply voltage obtained in said booster circuit,
• wherein said booster circuit includes a first circuit, which is a constant current source, connected at one end to an external ground terminal and a second circuit connected between the other end of said first circuit and said internal circuit for generating the internal power supply voltage, and a capacitor connected to a connection node of said first circuit and said second circuit and to a power supply node of said chip internal circuit,
• wherein said capacitor is charged by said first circuit when a first current flowing in said second circuit is smaller than a preset value and supplies a discharge current to said second circuit when the first current flowing in said second circuit is larger than the preset value, and
• wherein said first circuit is a circuit for supplying a second current with a first variation rate with time which is smaller than a second variation rate of a third current of flowing in said internal circuit with time.

A semiconductor device comprising:

• a voltage-down circuit for generating a first internal power supply voltage (Vint1) obtained by lowering an external power supply voltage (Vcc) in a chip;
• a booster circuit for generating a second internal power supply voltage (Vint2) obtained by raising an external ground voltage (Vss) in a chip;
• and
• a chip internal circuit applied with the internal power supply voltages (Vint1, Vint2) obtained in said voltage-down circuit and said booster circuit,
• wherein said voltage-down circuit includes a first circuit connected at one end to an external power supply and a second circuit connected between the other end of said first circuit and said internal circuit for generating the first internal power supply voltage (Vint1), and a first capacitor connected to a first connection node of said first circuit and said second circuit,
• wherein said booster circuit includes a third circuit connected at one end to an external ground terminal and a fourth circuit connected between the other end of said third circuit and said internal circuit for generating the internal power supply voltage (Vint2), and another node of said first capacitor is connected to a second connection node of said third circuit and said fourth circuit, and wherein
• said first circuit is a circuit for supplying a first current with a first variation rate with time which is smaller than the second variation rate of the second current flowing in said internal circuit with time, and
• said third circuit is a circuit for supplying a third current with a third variation rate with time which is smaller than the second variation rate of the second current flowing in said internal circuit with time.

A semiconductor device comprising:

• a constant current source, which has a first end connected to a first power supply and which supplies a predetermined current;
• a circuit connected between a second end of said constant current source and a second power supply and whose consumption current is varied between a greater value and a lesser value than the predetermined current;
• and
• a capacitor connected between said second end of said constant current source and said second power supply, and which is charged when the consumption current of said circuit is less than the predetermined current, and which is discharged when the consumption current of said circuit is greater than the predetermined current.

An implementation substrate comprising:

• a substrate;
• first and second power supply wirings formed on said substrate;
• a first semiconductor chip formed on said substrate and which is connected between said first power supply wirings and said second power supply wirings;
• and
• a second semiconductor chip formed on said substrate and which is connected between said first power supply wirings and said second power supply wirings, wherein
• at least one of said first and second semiconductor chip comprises:
• a constant current source, which has a first end connected to said first power supply wiring and which supplies a predetermined current;
• a circuit which is connected between a second end of said constant current source and said second power supply wiring and whose consumption current is varied between a greater value and a lesser value than the predetermined current;
• and
• a capacitor connected between said second end of said constant current source and said second power supply wiring, and which is charged when the consumption current of said circuit is less than the predetermined current, and which is discharged when the consumption current of said circuit is greater than the predetermined current.