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US 6,333,237 B1Granted
Method for manufacturing a semiconductor device
AssigneeNEC Corporation
InventorHiroshi Yoshida
Life of this patent
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Abstract
A method for manufacturing a semiconductor device separately forms two collector regions, two base extension regions, two base regions, and two collector extension regions on a first bipolar transistor forming region and a second bipolar transistor forming region that are formed on a semiconductor substrate, and includes a step of forming an emitter region on the first bipolar transistor region and forming, in the same process step, a base contact layer for an emitter electrode in the second bipolar transistor region as well, after which an emitter electrode is formed on the base contact layer.
Claims12
A method for manufacturing a semiconductor device having a first bipolar transistor of a first conductivity type and a second bipolar transistor of a second conductivity type on one and the same substrate and in mutual proximity, comprising:
- forming on a semiconductor substrate a region for forming said first bipolar transistor and a region for forming said second bipolar transistor and minimally separately forming in each transistor forming region, a collector region, a base extension region, a base region, and a collector extension region;
- covering the top of said semiconductor substrate with a first resist film and providing an aperture for an emitter contact in a part of the first resist film and corresponding to a base region of said first bipolar transistor;
- implanting a first impurity into said aperture, so as to form an SIC region of said first conductivity type at the bottom of the base region;
- forming a polysilicon layer over the entire surface of said semiconductor substrate, and then implanting a first impurity into said polysilicon layer;
- forming a second resist film over the entire surface of said semiconductor substrate, and then patterning said polysilicon layer so as to form in said first bipolar transistor formation region an emitter electrode part connected to said base region, and forming a mask layer that, in said second bipolar transistor formation region, covers a base region and the surrounding area, and that has a closed type aperture so as to expose at least a part of said base region in said second bipolar transistor formation region;
- using said second resist film as a mask to implant a second impurity over the entire surface of said semiconductor substrate, and form an SIC region of a second conductivity type at the bottom of the base region in said second bipolar transistor region;
- covering the entire surface of said semiconductor substrate with an insulation layer, and then removing said insulation layer by etching, so as to form a side wall on an emitter electrode part in said first bipolar transistor formation region and on said mask layer in said second bipolar transistor region;
- forming a polysilicon layer over the entire semiconductor substrate, and then implanting into said polysilicon layer a second impurity;
- forming a third resist film over the entire surface of said semiconductor substrate, and patterning said polysilicon layer, thereby forming an emitter region connected to said base region in said second bipolar transistor forming region;
- and
- heat treating said semiconductor substrate to form an emitter region of said first conductivity type and an emitter region of said second conductivity type.
8 more elements
A method for manufacturing a semiconductor device having a first bipolar transistor of a first conductivity type and a second bipolar transistor of a second conductivity type on one and the same substrate and in mutual proximity, comprising:
- forming on a semiconductor substrate a region for forming said first bipolar transistor and a region for forming said second bipolar transistor, minimally forming separately in said first bipolar transistor region a collector region, a base extension region, a base region, and a collector extension region, and minimally forming separately in said second bipolar transistor region a collector region, a base region, and a collector extension region;
- covering the top of said semiconductor substrate with a first resist film and in said first resist film, providing a first aperture and a second aperture for an emitter contact formed on a portion corresponding to a base region in said first bipolar transistor region and for a base contact formed on a portion corresponding to a base region in said second bipolar transistor region, respectively;
- implanting a first impurity into said first aperture, so as to form an SIC region of said first conductivity type at the bottom of said base region in said first bipolar transistor region;
- forming a polysilicon layer over the entire surface of said semiconductor substrate, and then implanting a first impurity into said polysilicon layer;
- forming a second resist film over the entire surface of said semiconductor substrate, and then patterning said polysilicon layer to form in said first bipolar transistor formation region an emitter electrode part connected to said base region, and forming a mask layer that, in said second bipolar transistor formation region, covers a base region and the surrounding area thereof, and that has a closed type aperture so as to expose at least part of said base region in said second bipolar transistor formation region;
- using said second resist film as a mask to implant a second impurity over the entire surface of said semiconductor substrate, and form an SIC region of a second conductivity type at the bottom of the base region in said second bipolar transistor region;
- covering the entire surface of said semiconductor substrate with an insulation layer, and then removing said insulation layer by etching, so as to form a sidewall on an emitter electrode part in said first bipolar transistor region and on said mask layer in said second bipolar transistor region;
- forming a polysilicon layer over the entire semiconductor substrate, and then implanting into said polysilicon layer a second impurity;
- forming a third resist film over the entire surface of said semiconductor substrate, and patterning said polysilicon layer, thereby forming an emitter electrode portion connected to said base region in said second bipolar transistor forming region;
- and
- heat treating said semiconductor substrate to form an emitter region of said first conductivity and an emitter region of said second conductivity.
8 more elements
Dependencies are inferred from the claim text.