Method to improve the control of bird's beak profile of poly in split gate flash

A method to improve the control of bird's beak profile of poly in split gate flash memory cell comprising the steps of:

• providing a silicon substrate having a plurality of active and field regions defined;
• forming a floating gate oxide layer over said substrate;
• forming an amorphous silicon layer over said floating gate oxide layer;
• performing a high temperature anneal of said amorphous silicon layer to recrystallize said amorphous layer to form a recrystallized layer having a smooth surface with a small grain size;
• patterning and forming a poly-oxide cap with a well-defined bird's beak over said recrystallized layer having said smooth surface with said small grain size;
• etching said recrystallized layer to form a floating gate with a sharp poly-tip underlying said bird's beak by using said poly-oxide cap with a well-defined bird's beak as a hard mask;
• forming a thin inter-poly oxide layer over said poly-oxide cap including said recrystallized layer having a smooth surface with a small grain size;
• and
• depositing a second polysilicon layer over said thin interpoly oxide layer to form a control gate of said split-gate flash memory cell.

A method to improve the control of bird's beak profile of poly in split gate flash memory cell comprising the steps of:

• providing a silicon substrate having a plurality of active and field regions defined;
• forming a floating gate oxide layer over said substrate;
• forming a first polycrystalline silicon layer over said floating gate oxide layer;
• performing a high temperature anneal of said first polycrystalline silicon layer to form a recrystallized having a smooth surface with a small grain size;
• forming a nitride layer over said recrystallized layer;
• forming openings in said nitride layer to expose portions of
• said recrystallized layer corresponding to a floating gate pattern;
• oxidizing portions of said recrystallized layer exposed in said openings in said layer of nitride to form a poly-oxide cap with a well-defined bird's beak over said recrystallized layer having said smooth surface with said small grain size;
• removing said nitride layer;
• etching said recrystallized layer to form a floating gate with a sharp poly-tip underlying said bird's beak using said poly-oxide cap with a well-defined bird's beak as a hard mask;
• forming a thin inter-poly oxide layer over said poly-oxide cap including said recrystallized layer having a smooth surface with a small grain size;
• and
• depositing a second polysilicon layer over said thin interpoly oxide layer to form a control gate of said split-gate flash memory cell.

A method to improve the control of bird's beak profile of poly in split gate flash memory cell comprising the steps of:

• providing a silicon substrate having a plurality of active and field regions defined;
• forming a floating gate oxide layer over said substrate;
• forming an amorphous silicon layer over said floating gate oxide layer;
• performing a high temperature anneal of said amorphous silicon layer to form a recrystallized layer having a smooth surface having small grain size;
• forming a nitride layer over said recrystallized layer;
• forming openings in said nitride layer to expose portions of said recrystallized layer corresponding to a floating gate pattern;
• oxidizing portions of said recrystallized layer exposed in said openings in said layer of nitride to form a poly-oxide cap with a well-defined bird's beak over said recrystallized layer having said smooth surface with said small grain size;
• removing said nitride layer;
• etching said recrystallized layer to form a floating gate with a sharp poly-tip underlying said bird's beak by using said poly-oxide cap with a well-defined bird's beak as a hard mask;
• forming a thin inter-poly oxide layer over said poly-oxide cap including said recrystallized layer having a smooth surface with a small grain size;
• and
• depositing a second polysilicon layer over said thin inter-poly oxide layer to form a control gate of said split-gate flash memory cell.