Integrated circuit layout design
AssigneeAgere Systems Guardian Corp.
InventorsWilhelm Carl Fischer, Thaddeus John Gabara
Life of this patent
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Abstract
A circuitry layout design allows more functional circuitry to be placed on an integrated circuit by placing functional circuitry on the unused silicon layer of the power I/O strip, which is located in the I/O ring surrounding the core of a processing integrated circuit. The functional circuitry placed on the power I/O strip can be shared by other I/O strips in order to conserve even more space.
Claims13
An integrated circuit having a layout that includes a center area with functional circuits thereon, and rectangular I/O strip areas along at least one perimeter of said integrated circuit, where at least one of said I/O strip areas is employed for carrying power to said integrated circuit (power I/O strip) through a conductor embedded in said power I/O strip, while remaining ones of said I/O strip areas are employed for passing signals to and from said integrated circuit and, optionally, processing said signals with signal processing circuits laid out in said I/O strip areas, the improvement comprising:
- signal-processing circuitry placed on said power I/O strip that processes signals other than processing signals on said conductor.
An integrated circuit having a layout that includes a center area with functional circuits thereon, and rectangular I/O strip areas along at least one perimeter of said integrated circuit, where at least one of said I/O strip areas is employed for carrying power to said integrated circuit (power I/O strip) through a conductor embedded in said power I/O strip, while remaining ones of said I/O strip areas are employed for passing signals to and from said integrated circuit and, optionally, processing said signals with signal processing circuits laid out in said I/O strip areas, the improvement comprising:
- signal-processing circuitry placed on one of said I/O strip areas that provides a signal to signal-processing circuits on a plurality of other I/O strip areas.
Dependencies are inferred from the claim text.