Apparatus and method for automatically generating circuit layouts
AssigneeAltera Corporation
InventorsPerry Chun, Richard C. Saito, Y. Eugene Chen
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Abstract
A method of automatically generating a custom device layout includes the step of specifying a device type and an associated set of device parameters. The device type is then matched to a selected cell in a cell library. Physical layout regions of the selected cell are then selectively modified in accordance with the device parameters. The physical layout regions may also be selectively modified in accordance with technology design rules in a design rule library. The physical layout regions of the selected cell are then drawn.
Claims12
A method of automatically generating a custom transistor layout, said method comprising the steps of:
- specifying a custom transistor type and an associated set of transistor parameters to characterize a custom transistor with non-standard cell characteristics;
- matching said custom transistor type to a custom transistor in a transistor library;
- modifying physical layout regions of said custom transistor in accordance with said transistor parameters, said physical layout regions characterizing fabricated integrated circuit components used to implement said custom transistor;
- and
- drawing said physical layout regions to form a modified custom transistor with said associated set of transistor parameters, said modified custom transistor forming a portion of a digital circuit.
A computer readable memory to direct a computer to function in a specified manner, comprising:
- (A) data stored in said memory, said data including:
- (1) a transistor library defining a plurality of custom transistors, and
- (2) a design rule library specifying a set of technology implementation design requirements for said plurality of custom transistors;
- and
- (B) executable instructions stored in said memory, said executable instructions including:
- (1) first instructions to process a specified custom transistor type and an associated set of transistor parameters to characterize a custom transistor with non-standard cell characteristics,
- (2) second instructions to match said custom transistor type to a selected custom transistor in said transistor library,
- (3) third instructions to selectively modify physical layout regions of said selected custom transistor in accordance with said transistor parameters and technology implementation design requirements, said physical layout regions characterizing fabricated integrated circuit components used to implement said custom transistor, and
- (4) fourth instructions to draw said physical layout regions of said selected custom transistor in accordance with said transistor parameters and technology implementation design requirements, said physical layout regions of said selected custom transistor forming a portion of a digital circuit.
Dependencies are inferred from the claim text.