Semiconductor memory device and method for manufacturing the same

A semiconductor memory device having a semiconductor substrate defining a main surface, a peripheral circuit area on the main surface in which a peripheral circuit is formed and a memory cell area on the main surface in which a memory cell is formed, the semiconductor memory device comprising:

• a first well formed in the peripheral circuit area;
• a second well of a first conductivity type, formed in the memory cell area, wherein the second well has a depth shallower than a depth of the first well;
• a third well of a second conductivity type, formed in the memory cell area, wherein the third well is in contact with the second well and is substantially equal in depth to the second well;
• a device isolation structure, formed in the memory cell area, wherein the second well and the third well are formed down to a level lower than the device isolation structure;
• a border region positioned between the peripheral circuit area and the memory cell area, wherein the first well is in contact with the border region but not in contact with the memory cell area;
• and
• dummy elements that do not function as active device elements, the dummy elements being formed in the border region in substantially the same device element forming density as that of the memory cells in the memory cell area, wherein the dummy elements are located on the same layer on which field effect transistors of the memory cells are formed.