Non-volatile semiconductor memory device and manufacturing method thereof

A non-volatile semiconductor memory device storing information by an accumulation of electric charge, comprising:

• a semiconductor substrate having a principal surface comprising a first region and a second region;
• at least one memory element including:
• a floating gate formed in the first region;
• a control gate formed on the floating gate;
• a first source/drain region formed in the first region;
• and a second source/drain region formed in the first region apart from the first source/drain region, located by the floating gate and the control gate therebetween;
• at least one access gate transistor for selectively activating the memory element, the access gate transistor comprising:
• a gate electrode formed in the second region;
• a third source/drain region formed in the second region;
• and a fourth source/drain region formed in the second region apart from the third source/drain region, located by the gate electrode therebetween,
• wherein a groove section is unavoidably formed in the semiconductor substrate between the floating gate and the gate electrode, and
• wherein the non-volatile semiconductor memory device further comprises an impurity region formed in the semiconductor substrate so as to cover the groove section, the impurity region electrically connecting the second source/drain region and the third source/drain region, and having a higher impurity concentration than the first and the fourth source/drain regions.