Method and structure for reducing the incidence of voiding in an underfill layer of an electronic component package
AssigneeLSI Logic Corporation
InventorsKumar Nagarajan, Sarathy Rajagopalan
Life of this patent
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Abstract
A packaging substrate includes a plurality of bonding pads and a plurality of gutters formed thereon. A die having conductive bumps on an electrically active surface thereof is positioned such that the conductive bumps of the die are electrically connected to the bonding pads of the packaging substrate. An underfill material fills the underfill space between the packaging substrate and the die to complete the structure. The plurality of gutters creates a linear flow front of the underfill material as it flows across the underfill space.
Claims23
An electronic component structure comprising:
- a packaging substrate including a plurality of bonding pads on a surface thereof;
- a plurality of gutters formed on the surface of the packaging substrate between adjacent bonding pads;
- a semiconductor die having conductive bumps on an electrically active surface thereof wherein the semiconductor die is aligned and positioned such that the conductive bumps are aligned with and electrically connected to the bonding pads of the packaging substrate;
- an underfill space defined between the surface of the packaging substrate and the electrically active surface of the semiconductor die;
- and
- an underfill material filling the underfill space wherein the plurality of gutters creates a substantially linear flow front of the underfill material as it propagates across the underfill space during filling.
A method for forming an underfill layer in an electronic component package comprising the steps of:
- a) providing a semiconductor die including a plurality of conductive bumps formed on an active surface thereof;
- b) providing a packaging substrate having a plurality of bonding pads on a surface thereof;
- c) forming a plurality of gutters on the surface of the packaging substrate between adjacent bonding pads;
- d) mounting the semiconductor die on the surface of the packaging substrate wherein an underfill space is formed between the semiconductor die and the packaging substrate;
- and
- e) filling the underfill space with an underfill material wherein the plurality of gutters creates a substantially linear flow front of the underfill material flowing into the underfill space.
A packaging substrate comprising:
- at least one layer of dielectric material, each of said at least one layer of dielectric material being formed over other layers of dielectric material;
- said at least one layer of dielectric material including a top layer formed thereon;
- said top layer including a plurality of bonding pads formed on a top surface thereof;
- and
- said top layer including a plurality of gutters formed thereon.
Dependencies are inferred from the claim text.