Electromagnetic interference gasket
AssigneeHewlett-Packard Company
InventorsDavid Dickey, James J. DeBlanc, Andrew M. Cherniski
Life of this patent
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AssigneeHewlett-Packard Company
InventorsDavid Dickey, James J. DeBlanc, Andrew M. Cherniski
Estimating the term…
An EMI device that provides a low impedance mechanism for conducting noise currents in all orientations back to the source of the noise currents in order to more effectively reduce EMI emissions is herein described. The EMI device is constructed from an elastomer core that is wrapped with a metallized electrically conductive material. The gasket is die cut and as such includes one or more open edges that are non-conductive. The non-conductive edges are stitched with a conductive material thereby enabling multiple conduction paths between any surface or edge of the gasket with a electrically conductive enclosure. In this manner, the gasket is able to provide a return path back to the source of the noise currents for all orientations of the noise currents and hence, more effectively reduce EMI emissions.
A gasket for reducing electromagnetic interference, comprising:
An apparatus for shielding electromagnetic interference, comprising:
A gasket for reducing electromagnetic interference, comprising:
Dependencies are inferred from the claim text.
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No related US applications are recorded in the indexed filing history.
Casings: with provisions to reduce aperture leakages in walls, e.g. terminals, connectors, cables
Polymer or resin containing [i.e., natural or synthetic]: textile, fabric, cloth, or pile containing [e.g., web, net, woven, knitted, mesh,…
Printed circuits
Technical subjects covered by former us classification
Term ended 12 Oct 2019 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
The present invention relates generally to electronic systems. More particularly, the invention relates to an electronic magnetic interference (EMI) surface conducting gasket.
The operation of electronic circuitry is often accompanied by the generation of noise currents that when radiated produce EMI emissions. The noise currents and the EMI emissions can cause significant electronic interference with other surrounding electronic circuitry. As such, the sources of these noise currents need to be effectively shielded in order to prevent this disturbance.
Typically, electronic circuitry is placed into an enclosure or housing. In one type of enclosure, there are slots on one wall of the enclosure that are used to house one or more I/O connectors. The I/O connectors are used to connect the electronic circuitry housed inside the enclosure with external peripheral devices. The I/O connector body or housing is a source of noise currents and potential EMI emissions and as such, requires effective shielding.
For a better understanding of the nature and objects of the invention, reference should be made to the following detailed description taken in conjunction with the accompanying drawings, in which:
FIG. 1 is a view of a first exemplary surface conducting gasket;
FIG. 2 is a view of a second exemplary surface conducting gasket;
Like reference numerals refer to corresponding parts throughout the several views of the drawings.
FIG. 3 illustrates an exemplary enclosure 200 housing electronic circuitry (not shown). The enclosure 200 can be placed into another enclosure that is part of a computer system, electrical system, or the like. The enclosure 200 can be fabricated of metal and has a number of walls 202a-202b. One such wall 202b has a number of slots 204a-204e that enable I/O connectors to connect to the electronic circuitry housed inside the enclosure 200 with external peripheral devices.
FIG. 4 illustrates an exemplary I/O connector 206 including a cable 208 and an I/O connector housing or body 210. The I/O connector housing 210 is typically mated with electronic equipment housed within the enclosure 200. It should be noted that the technology of the present invention is not constrained to any particular type of I/O connector and that the I/O connector shown in FIG. 4 is provided for illustration purposes only.