Method of fabricating semiconductor device
AssigneeHyundai Electronics Industries Co., Ltd.
InventorSeong-Hyung Park
Life of this patent
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Abstract
A method of fabricating a semiconductor device is disclosed in the present invention. The method includes the steps of forming first and second wells in the substrate, the first and second wells having first and second type conductivities, respectively, forming first, second, and third isolation layers in the substrate, forming first and second gate oxide layers on the first and second wells, forming first and second buried contact regions in the substrate, and forming first and second impurity regions in the first and second buried contact regions, and forming first and second gates on the first well and third and fourth gates on the second well, the first and fourth gates directly contacting the first and second buried contact regions, respectively.
Claims20
A method of fabricating a semiconductor device on a substrate, comprising the steps of:
- forming first and second wells in the substrate, the first and second wells having first and second type conductivities, respectively;
- forming first, second, and third isolation layers in the substrate;
- forming first and second gate oxide layers on the first and second wells;
- forming first and second buried contact regions in the substrate;
- forming first and second heavily doped regions in the first and second buried contact regions;
- forming first and third gates on the first well, and second and fourth gates on the second well, the third and fourth gates directly contacting the second and first buried contact regions, respectively;
- forming a first pair of lightly doped drain regions at both sides of the first gate using the first gate as a mask, wherein one of the lightly doped drain regions is positioned between the first gate and the second buried contact region;
- and
- forming a second pair of lightly doped drain regions at both sides of the second gate using the second gate as a mask, wherein one of the lightly doped drain regions is positioned between the second gate and the first buried contact region.
A method of fabricating a semiconductor device on a substrate, comprising the steps of:
- forming first and second wells in the substrate, the first and second wells having first and second type conductivities, respectively;
- forming first, second, and third isolation layers, respectively, in the first well, the first and second well, and the third well;
- forming first and second gate oxide layers on the first and second wells;
- forming first and second buried contact regions in the substrate between the first, second, and third isolation layers;
- forming first and second heavily doped regions in the first and second buried contact regions;
- forming first and third gates on the first well, and second and fourth gates on the second well, the third and fourth gates directly contacting the second and first buried contact regions, respectively;
- forming lightly doped drain regions at both sides of the first gate using the gate as a mask, wherein one of the lightly doped drain regions is positioned between the first gate and the second buried contact region;
- forming lightly doped drain regions at both sides of the second gate using the gate as a mask, wherein one of the lightly doped drain regions is positioned between the second gate and the first buried contact region;
- forming spacers on both sides of the first, second, third, and fourth gates;
- forming first and second pairs of heavily doped regions at both sides of the first and second gates using the gates including the spacers as masks;
- and
- forming a planarization layer on the substrate including the gates.
Dependencies are inferred from the claim text.