Manufacture of an integrated circuit isolation structure
AssigneeVLSI Technology, Inc.
InventorsOlivier Laparra, Ramiro Solis, Hunter Brugge, Michela S. Love, Bijan Moslehi, Milind Weling
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AssigneeVLSI Technology, Inc.
InventorsOlivier Laparra, Ramiro Solis, Hunter Brugge, Michela S. Love, Bijan Moslehi, Milind Weling
Estimating the term…
Disclosed are techniques to provide an integrated circuit, including the provision of improved integrated circuit isolation structures. The techniques include forming a number of trenches in an integrated circuit substrate to define a number of substrate regions that are to be electrically isolated from one another. A dielectric material is deposited in the trenches by exposure to a high density plasma having a first deposition-to-etch ratio. The high density plasma is adjusted to a second deposition-to-etch ratio greater than the first ratio to accumulate the dielectric material on the substrate after at least partially filling the trenches. A portion of the dielectric material is removed to planarize the workpiece. A number of components, such as insulated gate field effect transistors, may be subsequently formed in the substrate regions between the trenches.
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Dependencies are inferred from the claim text.