STI punch-through defects and stress reduction by high temperature oxide reflow process
AssigneeAdvanced Micro Devices, Inc.
InventorsTing Y. Tsui, Robert H. Tu, Xiao-Yu Li, Sunil D. Mehta
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Abstract
A method of manufacturing a semiconductor device with reduced shallow trench isolation defects and stress is disclosed. The disclosed method begins by providing a silicon substrate including a capping layer. A plurality of isolation trenches are then etched through the capping layer and into the silicon substrate to form a plurality of isolation regions in the silicon substrate. The isolation trenches are then filled with an oxide layer. The oxide layer and the capping layer are then polished back using techniques known in the art. After polishing, the semiconductor device is annealed between a temperature range of about 1150° C. to about 1200° C.
Claims23
A method of manufacturing a semiconductor device, comprising the steps of:
- providing a silicon substrate having at least one transistor formed with a plurality of patterned isolation regions and a capping layer, wherein the patterned isolation regions are filled with a dielectric material;
- and
- annealing the semiconductor device at a temperature in excess of about 1150° C.
A method of manufacturing a semiconductor device, comprising the step of:
- providing a silicon substrate having a capping layer;
- etching a plurality of isolation trenches in the silicon substrate, wherein the trenches are filled with an oxide layer;
- and
- annealing the semiconductor device between the temperature range of about 1150° C. to about 1200° C.
A method of manufacturing a semiconductor device, comprising the step of:
- providing a silicon substrate including a capping layer;
- etching a plurality of isolation trenches through the capping layer and into the silicon substrate to form plurality of isolation regions in the silicon substrate;
- filling the isolation trenches with an oxide layer;
- polishing back the oxide layer and the capping layer;
- and
- annealing the semiconductor device at a temperature in the range of 1150° C.-1200° C.
A method of manufacturing isolation regions in a semiconductor device, comprising the steps of:
- providing a silicon substrate having at least one transistor formed with a plurality of patterned isolation regions and a capping layer, wherein said plurality of patterned isolation regions are filled with tetraethyl orthosilicate;
- and
- annealing the semiconductor device at a temperature in excess of about 1150° C.
A method of manufacturing isolation regions in a semiconductor device, comprising the steps of:
- providing a silicon substrate having at least one transistor formed with a plurality of patterned isolation regions and a capping layer, wherein at least one of the patterned isolation regions includes a jog;
- and
- annealing the semiconductor device at a temperature in excess of about 1150° C.
A method of manufacturing a semiconductor device, comprising the steps of:
- providing a silicon substrate having a capping layer;
- etching a plurality of isolation trenches in the silicon substrate, wherein the isolation trenches are filled with tetraethyl orthosilicate;
- and
- annealing the semiconductor device between the temperature range of about 1150° C. to about 1200° C.
A method of manufacturing a semiconductor device, comprising the steps of:
- providing a silicon substrate including a capping layer;
- etching a plurality of isolation trenches through the capping layer and into the silicon substrate to form plurality of isolation regions in the silicon substrate;
- filling the isolation trenches with tetraethyl orthosilicate;
- polishing back the oxide layer and the capping layer;
- and
- annealing the semiconductor device at a temperature in the range of 1150° C.-1200° C.
A method of manufacturing a semiconductor device, comprising the steps of:
- providing a silicon substrate having a capping layer;
- etching a plurality of isolation trenches in the silicon substrate, wherein the isolation trenches are filled with an oxide layer;
- and
- annealing the semiconductor device at a temperature equal to the glass transition temperature of the oxide layer.
A method of manufacturing a semiconductor device, comprising the steps of:
- providing a silicon substrate having a capping layer;
- etching a plurality of isolation trenches in the silicon substrate, wherein the isolation trenches are filled with an oxide layer;
- and
- annealing the semiconductor device at a temperature equal to or greater than the glass transition temperature of the oxide layer.
Dependencies are inferred from the claim text.