Method for manufacturing capacitor

A method for manufacturing a capacitor, comprising the steps of:

• providing a substrate divided into a memory cell region and a peripheral circuit region, wherein the memory cell region has an isolation structure therein;
• forming a bottom polysilicon electrode over the isolation structure;
• forming a metal silicide layer over the bottom polysilicon electrode;
• forming a dielectric layer over the metal silicide layer;
• and
• forming a metallic top electrode over the dielectric layer.

A method for manufacturing a capacitor, comprising the steps of:

• providing a substrate divided into a memory cell region and a peripheral circuit region, wherein the memory cell region has an isolation structure therein;
• forming a gate oxide layer over the substrate in the peripheral circuit region and outside the isolation structure in the memory cell region;
• forming a polysilicon layer over the gate oxide layer and the isolation structure;
• patterning the polysilicon layer and the gate oxide layer so that a bottom electrode is formed above the isolation structure and a polysilicon gate electrode is formed in the peripheral circuit region;
• forming spacers on sidewalls of the polysilicon gate electrode and the bottom electrode;
• forming a metal silicide layer over the bottom electrode and the polysilicon gate electrode;
• forming a dielectric layer over the metal silicide layer above the bottom electrode;
• and
• forming a metallic layer directly on the dielectric layer.