Test structures for testing planarization systems and methods for using same
AssigneeAgere Systems Guardian Corp.
InventorsAlvaro Maury, Frank Miceli, Subramanian Karthikeyan
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AssigneeAgere Systems Guardian Corp.
InventorsAlvaro Maury, Frank Miceli, Subramanian Karthikeyan
Estimating the term…
Test structures are disclosed for use in a system and with an associated method to test the effectiveness of planarization systems used in the fabrication of semiconductor devices and integrated circuits. A method of creating the test structure utilizes traditional semiconductor fabrication techniques, but uses substantially similar materials, such as oxide, for each of the layers of the test structure. Because the test structure comprises layers of substantially the same material, reliable uniform measurements of the thickness of the test structure may be obtained by an optical metrology tool. These measurements may then be analyzed and displayed in tabular reports or multi-dimensional plots to judge the effectiveness of the planarization system.
A method for fabricating a test structure for evaluating the planarity of a semiconductor wafer structure, comprising:
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