Method to form shallow trench isolations without a chemical mechanical polish

A method of forming shallow trench isolations in the manufacture of an integrated circuit device comprising:

• growing a pad oxide layer overlying a semiconductor substrate;
• depositing a silicon nitride layer overlying said pad oxide layer;
• patterning said silicon nitride layer, said pad oxide layer, and said semiconductor substrate to form trenches for planned shallow trench isolations;
• growing a liner oxide layer overlying said semiconductor substrate in said trenches;
• depositing a silicon dioxide spacer layer overlying said silicon nitride layer and said liner oxide layer to partially fill said trenches;
• anisotropically etching said silicon dioxide spacer layer and said liner oxide layer to form sidewall spacers inside said trenches and to expose the bottom of said trenches;
• selectively growing a silicon layer overlying said semiconductor substrate in said trenches wherein said silicon layer partially fills said trenches;
• forming a trench oxide layer overlying said silicon layer;
• removing said silicon nitride layer;
• and
• removing said pad oxide layer to complete said shallow trench isolation in the manufacture of said integrated circuit device.

A method of forming shallow trench isolations in the manufacture of an integrated circuit device comprising:

• growing a pad oxide layer overlying a semiconductor substrate;
• depositing a silicon nitride layer overlying said pad oxide layer;
• patterning said silicon nitride layer, said pad oxide layer, and said semiconductor substrate to form trenches for planned shallow trench isolations;
• growing a liner oxide layer overlying said semiconductor substrate in said trenches;
• depositing a silicon dioxide spacer layer overlying said silicon nitride layer and said liner oxide layer to partially fill said trenches;
• anisotropically etching said silicon dioxide spacer layer and said liner oxide layer to form sidewall spacers inside said trenches and to expose the bottom of said trenches;
• selectively growing a silicon layer in said trenches wherein said silicon layer partially fills said trenches and wherein said selective growing is by selective epitaxial growth;
• growing a trench oxide layer overlying said silicon layer;
• removing said silicon nitride layer;
• and
• removing said pad oxide layer to complete said shallow trench isolation in the manufacture of said integrated circuit device.