Narrowband digital cordless telephone with a logic high weak driver and a logic low strong driver for keypad interface

In a device comprising an array of switches arranged to couple a first set of terminals on a first axis of the array to a second set of terminals on a second axis of the array, the switches arranged for sending signals to a decoding logic, and further arranged so that a short can occur between any two terminals of the first set, a system for converting an indeterminate signal resulting from a short to a determinate signal, comprising:

• weak logic low drivers coupled to the terminals of the first set;
• strong logic high drivers arranged to pull logic low and coupled to the weak logic low drivers and to the terminals of the first set;
• weak high pull-down drivers coupled to the terminals of the second set;
• and
• input buffers comprising Schmitt trigger inverters and coupled to the weak high pull-down drivers and to the terminals of the second set.

A digital cordless telecommunications unit, the unit including a baseband chip, the unit adapted for receiving and transmitting analog voice signals, for transmitting digital baseband signals, and for receiving digital formatted baseband signals, comprising:

• an audio functions block, comprising:
• a. an audio front end for receiving said analog receive voice signals and transmitting said analog transmit voice signals;
• b. an adaptive differential pulse code modulator codec connected to said audio front end, said codec converting said analog receive voice signals to said digital baseband transmit signals and converting said digital formatted baseband receive signals to said analog transmit voice signals;
• and
• a system control functions block, comprising:
• a. a microcontroller for controlling the baseband chip;
• b. a memory accessible by the microcontroller for storing control instructions;
• c. an interrupt controller connected to the microcontroller;
• d. a wake-up timer connected to the interrupt controller;
• e. a clock generator connected to the microcontroller;
• f. a synchronous serial port connected to the interrupt controller;
• and
• g. parallel ports connected to the interrupt controller, the parallel ports comprising an array of switches arranged to couple a first set of terminals on a first axis of the array to a second set of terminals on a second axis of the array, and further comprising:
• (1) weak logic high drivers coupled to the terminals of the first set;
• (2) strong logic low drivers arranged to pull logic low and coupled to the weak logic high drivers and to the terminals of the first set;
• (3) weak high pull-up drivers coupled to the terminals of the second set;
• and
• (4) in parallel with the weak high pull-up drivers, input buffers comprising Schmitt trigger inverters and coupled to the weak high pull-up drivers and to the terminals of the second set.