US 6,297,849 B1 · Output timebase corrector

Abstract

An output timebase corrector converts orthogonal sampled video (VS) into asynchronous sampled video (VOS) with asynchronous sample values occurring at clock instants (TC) of a clock signal (CLK). The asynchronous sampled video (VOS) is displayed on a display screen of a display device (DD). A discrete time oscillator (DTO) of a time-discrete phase-locked loop (PLL) supplies a time base signal (OS). The time-discrete phase-locked loop (PLL) determines a phase difference (PE) between the time base signal (OS) and reference instants (FB) indicating a timing of a line deflection of the display device (DD) to obtain the time base signal (OS) being locked to the reference instants (FB). The time base signal (OS) controls a sample rate converter (SRC) such that the asynchronous video values (VOS) which occur at the clock instants (TC) are interpolated from the orthogonal sampled video (VS) by the sample rate converter (SRC) such that the video signal is displayed on the correct position on the display screen. In the output timebase corrector according to the invention all circuits are clocked by clock signals (CLK) originating from one and the same clock generator (OSC).

Claims8

Dependent claims

An output timebase corrector comprising:

a clock generator (OSC) for determining clock instants (TC),
a control circuit (CC) for generating a control signal (CS) in dependence on reference instants (FB) indicating a timing of a line deflection of a display device (DD),
a time-discrete signal converter (SC) for receiving the clock instants (TC), video samples (VS) on an orthogonal sampling grid, and the control signal (CS) to supply asynchronous output video samples (VOS) to the display device (DD),
characterized in that
said clock generator determines said clock instants with a fixed repetition frequency independent of line synchronizing signals in received video signals and independent of a repetition frequency of the line deflection of the display device,
the control circuit (CC) comprises a time-discrete phase-locked loop (PLL) for receiving the clock instants (TC) and the reference instants (FB) to supply a time base signal (OS) being locked to the reference instants (FB), and
said signal converter (SC) comprises a sample rate converter (SRC) for receiving said time base signal (OS) as the control signal (CS) to supply said output video samples (VOS) at said clock instants (TC).

4 more elements

Dependencies are inferred from the claim text.

Output timebase corrector

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Output timebase corrector

Life of this patent

Abstract

Claims8