Current generating circuit
AssigneeKabushiki Kaisha Toshiba
InventorHiroshi Nakamura
Life of this patent
Estimating the term…
Abstract
MOS transistor P01 is connected between the supply terminal Vcc and node a. Resistor R1 is connected between the node a and the grounding terminal GND. MOS transistor P03 is used to reduce the consumed current when the circuit is not in operation. Differential amplifier cmp1 compares the potential in01 of the node a and reference potential Vref and applies a control signal to the gate of the MOS transistor so as to make the potential in01 of the node a equal to the reference potential Vref. At the same time, the control signal is also applied to the gate of MOS transistor P02. The MOS transistor P02 generates an electric current as a function of the electric current flowing to the MOS transistor P01.
Claims58
A current generating circuit comprising:
- a first transistor connected between a first supply terminal and a node directly or by way of another element;
- a total of k first elements (0≦k ≦n (where n is 0 or a natural number)) connected between said first supply terminal and said node directly or by way of another element;
- a total of n−k second elements connected between said node and a second supply terminal directly or by way of another element;
- a control circuit for setting a potential of said node to a predetermined level;
- and
- a second transistor having a source connected to said first supply terminal directly or by way of another element and a gate connected to a gate of said first transistor and adapted to generate a second current by using a first current flowing to said first transistor as a reference, the first current flowing to said first transistor showing a current value equal to the value obtained by subtracting the sum of currents flowing to the respective k first elements from the sum of currents flowing to the respective n−k second elements.
A current generating circuit comprising:
- a first transistor connected between a first supply terminal and a node directly or by way of another element;
- a first element connected between said first supply terminal and said node directly or by way of another element;
- a second element connected between said node and a second supply terminal directly or by way of another element;
- a control circuit for setting a potential of said node to a predetermined level;
- and
- a second transistor having a source connected to said first supply terminal directly or by way of another element and a gate connected to a gate of said first transistor and adapted to generate a second current by using a first current flowing to said first transistor as a reference, the first current flowing to said first transistor showing a current value equal to the value obtained by subtracting a current flowing to the first element from a current flowing to the second element.
A current generating circuit comprising:
- a first transistor connected between a first supply terminal and a node directly or by way of another element;
- at least one transistor and at least one element other than a transistor connected between said node and a second supply terminal directly or by way of another element, a gate potential of said at least one transistor being different from a gate potential of said first transistor;
- a control circuit for setting a potential of said node to a predetermined level;
- and
- a second transistor having a source connected to said first supply terminal directly or by way of another element and a gate connected to a gate of said first transistor and adapted to generate a second current by using a first current flowing to said first transistor as a reference, the first current flowing to said first transistor showing a current value equal to the sum of currents flowing respectively to said at least one transistor and said at least one element not a transistor.
A current generating circuit comprising:
- a first transistor connected between a first supply terminal and a node directly or by way of another element;
- a first element connected between said first supply terminal and said node directly or by way of another element;
- a second element connected between said node and a second supply terminal directly or by way of another element;
- a second transistor having a source connected to said first supply terminal directly or by way of another element and a gate connected to a gate of said first transistor and adapted to generate a second current by using a first current flowing to said first transistor as a reference;
- and
- a differential amplifier adapted to compare a potential of said node and a reference potential and applying a control signal reflecting the outcome of the comparison to the gate of said first transistor and a gate of said second transistor.
A current generating circuit comprising:
- a first transistor connected between a first supply terminal and a node directly or by way of another element;
- a second transistor and a third transistor connected in parallel between said node and a second supply terminal, a gate potential of said second transistor being different from a gate potential of said first transistor and a gate potential of said third transistor being different from the gate potentials of said first and second transistors;
- a control circuit for setting a potential of said node to a predetermined level;
- and
- a fourth transistor having a source connected to said first supply terminal directly or by way of another element and a gate connected to a gate of said first transistor and adapted to generate a second current by using a first current flowing to said first transistor as a reference,
- wherein a supply potential is applied to said first supply terminal and a ground potential is applied to said second supply terminal.
A current generating circuit comprising:
- a first transistor connected between a first supply terminal and a node directly or by way of another element;
- a second transistor and a third transistor connected between said node and a second supply terminal directly or by way of another element, a gate potential of said second transistor being different from a gate potential of said first transistor and a gate potential of said third transistor being different from the gate potentials of said first and second transistors;
- a control circuit for setting a potential of said node to a predetermined level;
- and
- a fourth transistor having a source connected to said first supply terminal directly or by way of another element and a gate connected to a gate of said first transistor and adapted to generate a second current by using a first current flowing to said first transistor as a reference;
- the gate potential of said third transistor is different from the gate potentials of said first and second transistors if the potential of said node is expressed by Vref and a supply potential is expressed by Vcc and if a, b, and c are respectively first, second, and third constants, said fourth transistor generates a current expressed by formula:
- (a×Vref)+(b×{Vcc−c×(Vref)}.
Dependencies are inferred from the claim text.