TFT substrate with low contact resistance and damage resistant terminals

A TFT substrate comprising:

• an underlying substrate having an insulating surface;
• a gate electrode disposed on the insulating surface of said underlying substrate;
• a first insulating film covering the insulating surface of said underlying substrate and said gate electrode;
• a channel layer made of semiconductor and disposed on said first insulating film, the channel layer overriding said gate electrode;
• first and second conductive films made of Al or Al alloy and disposed on an upper surface of said channel layer on both sides of said gate electrode;
• a first upper conductive film disposed on said first conductive film and formed with a first opening;
• a second upper conductive film disposed on said second conductive film;
• a second insulating film covering said first and second upper conductive films and said channel layer and formed with a second opening, an inner wall of the second opening being retreated from an inner wall of the first opening;
• and
• an ITO film covering a partial upper surface of said second insulating film and inner surfaces of the first and second openings, and contacting a partial upper surface of said first upper conductive film at a region defining a part of the inner surface of the second opening.

A thin film transistor substrate comprising:

• a substrate having a principal surface;
• a plurality of thin film transistors formed on the principal surface of said substrate, each thin film transistor including a gate electrode, a channel layer, a source electrode and a drain electrode;
• a first terminal formed on the principal surface of said substrate, said first terminal being connected to one of the gate electrode and the drain electrode of at least one thin film transistor;
• a protective insulating film formed on the principal surface of said substrate, covering the plurality of thin film transistors and said first terminal;
• a first contact hole formed, at a position corresponding to the source electrode of each thin film transistor, through said protective insulating film to an upper surface of the source electrode;
• a pixel electrode formed on said protective insulating film in correspondence with each thin film transistor, said pixel electrode being connected to the source electrode of a corresponding thin film transistor via said first contact hole;
• a second contact hole formed in a ring, at a position corresponding to said first terminal, through said protective insulating film to an upper surface of said first terminal, said second contact hole being disposed so that said protective insulating film is left inside said ring;
• and
• a first terminal protective conductive film formed on said protective insulating film, said first terminal protective conductive film being connected to said first terminal via said second contact hole, covering said protective insulating film left in the inner area of said first terminal, and being made of material same as material of said pixel electrode.

A thin film transistor substrate comprising:

• a substrate having a principal surface;
• a plurality of thin film transistors formed on the principal surface of said substrate, each thin film transistor including a gate electrode, a channel layer, a source electrode and a drain electrode, said thin film transistor being an inversely staggered type thin film transistor;
• a contact area formed on the principal surface of said substrate;
• said contact area being connected to the drain electrode of at least one thin film transistor and includes at least a first conductive film and a second conductive film formed on the first conductive film;
• a protective insulating film formed on the principal surface of said substrate, covering said thin film transistor and said contact area;
• a first contact hole formed, at a position corresponding to the source electrode of each thin film transistor, through said protective insulating film;
• a pixel electrode formed on said protective insulating film in correspondence with each thin film transistor, said pixel electrode being connected to the source electrode of a corresponding thin film transistor via said first contact hole;
• a second contact hole formed, at a position corresponding to said contact area, through said protective insulating film and said second conductive film, said second contact hole having a step defined by a portion of an upper surface of the second conductive film;
• and
• a terminal conductive film formed on said protective insulating film in correspondence with said contact area, said terminal conductive film being connected to said contact area via said second contact hole, and electrically connected to an upper surface of the second conductive film defining the step on the side wall of said second contact hole.

An ITO film contact structure comprising:

• a lower conductive film made of Al or alloy containing Al as a main component;
• an upper conductive film disposed on said lower conductive film and made of a material different from Al;
• an insulating film disposed on said upper conductive film;
• an opening being bored through said lower conductive film, said upper conductive film and said insulating film, an inner side wall of said opening having a step defined by a part of a top surface of said upper conductive film, and a bottom of said opening being defined by a part of a top surface of said lower conductive film;
• and
• an ITO film covering a partial upper surface of said insulating film and said inner side wall and bottom of said opening, said ITO film being contacted to said upper conductive film at the step of said opening, and being contacted to said lower conductive film at the bottom of said opening.