Edge key generating method and edge key generating apparatus
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsNobukatsu Okuda, Yoshiki Yamada
Life of this patent
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Abstract
To enable interlacing edge-generating means to be used for a progressive image signal that is separated into lines as two sequences of signals, the present invention comprises a pre-edge processing circuit (11) that executes appropriate pre-edge processing on the progressive image signal separated into lines depending on the condition of each of the two signals, and an edge generating circuit (18, 19) that executes on the two signals after pre-edge processing pre-edge generation processing similar to that for interlacing.
Claims5
An edge key generating method for progressive image signals, comprising
- executing pre-edge processing that generates on a horizontal scanning line above or below a key signal a key signal equivalent to said key signal;
- executing edge addition processing on the output from said pre-edge processing which output includes two sequences of signals each appearing on every other horizontal scanning line;
- and
- line multiplexing to obtain a progressive image signal to which edges have been added.
An edge key generating method, comprising
- executing pre-edge processing that generates on a horizontal scanning line above or below a key signal a key signal equivalent to said key signal;
- and
- executing edge addition processing on the output from said pre-edge processing which output includes two sequences of signals each appearing on every other horizontal scanning line;
- wherein
- the method synthesizes the key signal prior to the pre-edge processing and the key signal after the edge addition processing.
An edge key generating apparatus comprising:
- a pre-edge processing circuit that generates on a horizontal scanning line above or below a key signal a key signal equivalent to said key signal to output two sequences of signals each appearing on every other horizontal scanning line;
- a first edge generating circuit that executes edge addition processing on one of the signals in the output from said pre-edge processing circuit;
- and
- a second edge generating circuit that executes edge addition processing on the other signal in the output from the pre-edge processing circuit.
Dependencies are inferred from the claim text.