Low bandwidth display mode centering for flat panel display controller
AssigneeCompaq Computer Corporation
InventorsPaul A. Ward, Mark L. Reinke, Henry M. D'Souza
Life of this patent
Estimating the term…
Abstract
A system positions an image with a plurality of lines on a display device. The system determines the number of black lines required to vertically center the image in a frame of the display device as m+n; displays m black lines using a first horizontal sync period at the start of each frame, the first horizontal sync period being less than the horizontal sync period of the display device; displays each line of the image; and displays n black lines using the second horizontal sync period until the end of the frame.
Claims30
A method of positioning an image on a display device with reduced bandwidth, the image having one or more lines, comprising:
- determining the number of black lines required to vertically center the image in a frame of the display device as m+n;
- displaying m black lines using a plurality of m fast horizontal sync signals while loading a line buffer less than m times;
- displaying each line of the image using a plurality of slow horizontal sync signals;
- and
- displaying n black lines using a plurality of n fast horizontal sync signals until the end of the frame while loading the line buffer less than n times.
An apparatus for positioning an image on a display device with reduced bandwidth, the image having one or more lines, comprising:
- means for determining the number of black lines required to vertically center the image in a frame of the display device as m+n;
- means for displaying m black lines using a plurality of m fast horizontal sync signals while loading a line buffer less than m times;
- means for displaying each line of the image using a plurality of slow horizontal sync signals;
- and
- displaying n black lines using a plurality of n fast horizontal sync signals until the end of the frame while loading the line buffer less than n times.
A computer system, comprising:
- a processor;
- a data storage device coupled to the processor;
- a display device coupled to the processor and having a vertical display period with a plurality of m fast horizontal sync signals, the display device rendering an image having one or more lines;
- and
- an apparatus for positioning the image on the display device, including:
- means for determining the number of black lines required to vertically center the image in a frame of the display device as m+n;
- means for displaying m black lines using a plurality of horizontal sync signals while loading a line buffer less than m times;
- means for displaying each line of the image using a plurality of slow horizontal sync signals;
- and
- displaying n black lines using a plurality of n fast horizontal sync signals until the end of the frame while loading the line buffer less than n times.
Dependencies are inferred from the claim text.