US 6,294,434 B1 · Method of forming a metal silicide layer on a polysilicon gate structure and on a source/drain region of a MOSFET device

Abstract

A process of forming a metal silicide layer, for a salicide gate structure, and forming a metal silicide layer for a MOSFET source/drain region, featuring ion implanted metal ions providing the metal component of the metal silicide layers, has been developed. After formation of a polysilicon gate structure, and of a heavily doped source/drain region, metal ions are implanted into a top portion of both the heavily doped source/drain region, and polysilicon gate structure. The metal ions are chosen from a group that includes titanium, tantalum, platinum, palladium, nickel and cobalt ions. A first anneal procedure is then employed resulting in the formation of the metal silicide layer on the heavily doped source/drain region, and formation of a salicide gate structure, comprised of metal silicide on the polysilicon gate structure. Selective removal of unreacted metal ions is then accomplished using wet etchant solutions, followed by a second anneal procedure, used to reduce the resistance of the metal silicide layers. The use of implanted metal ions, when compared to a blanket deposited metal layer, reduces the risk of unremoved metal, or formation of metal silicide ribbons, located on the surface of insulator, at the conclusion of the selective removal procedure, resulting in gate to substrate leakage or shorts.

Claims19

Dependent claims

A method of fabricating a metal oxide semiconductor field effect transistor (MOSFET), device on a semiconductor substrate, comprising the steps of:

forming a gate insulator layer on said semiconductor substrate;
forming a gate structure on said gate insulator layer;
forming insulator spacers on the sides of said gate structure;
forming a heavily doped source/drain region in an area of said semiconductor substrate not covered by said gate structure or by said insulator spacers;
performing a blanket ion implantation procedure to place metal ions into a top portion of said heavily doped source/drain region, and into a top portion of said gate structure;
performing a first anneal procedure to form first metal silicide layers on the top surface of said heavily doped source/drain region, and to form a second metal silicide layer on the top surface of said gate structure, resulting in a salicide gate structure comprised of said second metal silicide layer, on underlying, said gate structure, leaving unreacted metal ions located on said insulator spacers;
selectively removing said unreacted metal ions;
and
performing a second anneal cycle to convert said first metal silicide layers, and said second metal silicide layer, to lower resistance, metal silicide layers.

6 more elements

A method of forming a metal silicide layer, on a MOSFET source/drain region, and on a MOSFET gate structure, on a semiconductor substrate, featuring a blanket ion implantation procedure to supply the metal component of the metal silicide layers, anneal cycles to convert implanted metal ions to said metal silicide layer, and to selectively remove unreacted metal ions, comprising the steps of:

providing a polysilicon gate structure on an underlying silicon dioxide gate insulator layer, with insulator spacers located on the sides of said polysilicon gate structure, and with a heavily doped source/drain region located in a region of said semiconductor substrate not covered by said polysilicon gate structure, or by said insulator spacers;
performing said blanket ion implantation procedure, at an implant angle between about 0 to 20°, to place said metal ions into a top portion of said heavily doped source/drain region, into a top portion of said polysilicon gate structure, and into said insulator spacers;
performing a first rapid thermal anneal procedure to form first metal silicide layers on said heavily doped source/drain region, and to form a second metal silicide layer on said polysilicon gate structure, resulting in a salicide gate structure comprised of said second metal silicide layer on said polysilicon gate structure, while leaving said metal ions in said insulator spacers unreacted;
selectively removing said unreacted metal ions from said insulator layer, via use of a solution comprised of H2O2—NH4OH—H2O, at a temperature between about 60 to 100° C.;
and
performing a second rapid thermal anneal procedure to convert said first metal silicide layers and said second metal silicide layer, to lower resistance metal silicide layers.

3 more elements

Dependencies are inferred from the claim text.

Method of forming a metal silicide layer on a polysilicon gate structure and on a source/drain region of a MOSFET device

Life of this patent

Method of forming a metal silicide layer on a polysilicon gate structure and on a source/drain region of a MOSFET device

Life of this patent

Abstract

Claims19