Proximity correction software for wafer lithography
AssigneeAvant! Corporation
InventorsMichael L. Rieger, John P. Stirniman
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AssigneeAvant! Corporation
InventorsMichael L. Rieger, John P. Stirniman
Estimating the term…
A system for computing a pattern function for a polygonal pattern having a finite number of predetermined face angles. One method includes the steps of decomposing the polygon into a set of flashes, computing the pattern function by summing together all flashes evaluated at a point (x,y), and the pattern function returning a 1 if point (x,y) is inside a polygon and otherwise will return a 0. Another method for computing a two-dimensional convolution value for any point (x,y) on a polygonal pattern includes the steps of identifying a set of half-plane basis functions corresponding to each face angle of the polygonal pattern, convolving each half-plane basis function with a convolution kernel using integration to find convolved flash (cflash) x,y values, storing the cflash (x,y) values to a two-dimensional look-up table, decomposing the polygonal pattern into a set of flashes where each of the flashes is an instance of the half-plane basis functions, and computing a convolution value for point (x,y) by looking-up a corresponding cflash x,y value for each flash in the table and summing together the corresponding cflash x,y values. The present invention may be used in a method for determining correction steps to which a design layout is to be subjected during wafer proximity correction.
A method implemented in a computer for computing a convolution value for a point x, y on a pattern of a plurality of polygons (hereinafter “polygonal pattern”), each of said polygons having only face angles selected from a set of predetermined face angles, said method comprising:
A method implemented in a computer for computing a convolution value for a point x, y on a polygonal pattern, said polygonal pattern including a plurality of vertices and angles, said method comprising:
A method implemented in a computer for identifying proximity correction on an original design layout, said method comprising:
A method implemented in a computer for identifying an original design layout to correct for distortions during a wafer lithography process, said method comprising:
Dependencies are inferred from the claim text.