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US 6,289,298 B1Granted
Method and apparatus for quasi full-wave modeling of interactions in circuits
AssigneeAgere Systems Guardian Corp.
InventorNathan R. Belk
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AssigneeAgere Systems Guardian Corp.
InventorNathan R. Belk
Estimating the term…
Electrodynamically determined electric field and/or current distributions are employed in conjunction with statically determined electric field distributions localized to metalization structures on a conductive substrate to model metal structures to be fabricated on a substrate. Specifically, the static electric field distributions are subtracted from the electrodynamic field distributions and the results are used to determine the electrodynamic component of self and mutual interactions between metalization structures to be fabricated on the conductive substrate. Then, statically determined current interactions of the metalization structures to be fabricated are determined and superimposed on the electrodynamic interactions. The results of the superimposition are used to generate the overall integrated circuit metal structure to be fabricated on the conductive substrate. In a specific embodiment of the invention, a static determination of electric field distributions caused by a time invariant point current source is obtained in the absence of the substrate and subtracted from the electrodynamically obtained electric field distributions from the interaction of a vector potential caused by a time variant point current in the presence of the substrate. The resulting difference values that are valid for all metalization structures fabricated on this type of substrate are stored in a look-up table. Then, when a simulation of the interactions, for example, of an inductor or other system of metals, on a conductive substrate is made the weakly spatially dependent electrodynamic component of the substrate interactions from the look-up table are superimposed on a very efficiently determined static solution for the inductor or other system of metals being simulated. The results of the superimposition are used to generate the overall integrated circuit metal structure on the conductive substrate.
A method for obtaining electrical properties of physical metalization structures to be fabricated in the vicinity of planar conductive substrates comprising the steps of:
Apparatus for obtaining electrical properties of physical metalization structures to be fabricated in the vicinity of planar conductive substrates comprising:
Apparatus for obtaining electrical properties of physical metalization structures to be fabricated in the vicinity of planar conductive substrates comprising:
Dependencies are inferred from the claim text.