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US 6,285,536 B1Granted
High voltage input pad system
AssigneeCirrus Logic, Inc.
InventorsDouglas R. Holberg, Nadi R. Itani, David R. Welland
Life of this patent
Estimating the term…
Abstract
A high voltage input pad and method for accepting electrostatic discharge (ESD) surges without damage to an input semiconductor amplifier. The protection system includes a metal gate, transistor, and n-well resistors which provide ESD protection. Protection is further provided against large voltages coupled to an amplifier by connecting an input bipolar junction transistor to the negative input connection of the amplifier. Negative surges are directed to ground with an anode grounded diode connected at its cathode to the negative input connection of the amplifier.
Claims19
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, said circuit comprising:
- a first circuit portion including:
- a first diode having an anode and a cathode, said anode being coupled to a ground,
- a first n-well resistor having one end coupled to an input for said first circuit portion and another end coupled to the cathode of said first diode,
- a second n-well resistor having one end coupled to an output for said first circuit portion and another end coupled to the cathode of said diode, and
- a metal gate transistor (MGT) having a metal gate, a source coupled to ground, and a drain, the metal gate, and the drain being coupled to the cathode of said diode;
- and
- a second circuit portion, having an input coupled to the output of the first circuit portion, said second circuit portion including:
- a first diode having an anode coupled to around and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages,
- a bipolar function transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting Positive electrostatic discharge voltages,
- a first transistor including source, drain, and gate, said drain and gate being coupled to each other, to the base of the bipolar junction transistor and to a second input of the second circuit portion, and
- a second transistor connected in series with said first transistor, said second transistor including source, drain and gate, and said gate and drain of said second transistor being coupled to each other, and the source of said first transistor being coupled to the drain of said second transistor.
8 more elements
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, said circuit comprising:
- a first circuit portion including:
- an n-well resistor having first and second resistor connections, said first resistor connection being coupled to an input of the first circuit portion and said second resistor connection being coupled to an output of the first circuit portion,
- a first diode having an anode and a cathode, the anode coupled to ground and the cathode coupled to said first resistor connection, and
- a second diode having an anode and a cathode, said anode coupled to ground and the cathode coupled to said second resistor connection;
- and
- a second circuit portion, having an input coupled to the output of the first circuit portion, said second circuit portion including:
- a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages,
- a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages,
- a first transistor including source, drain, and gate, and said drain and gate being coupled to each other, to the base of the bipolar junction transistor and to a second input of the second circuit portion, and
- a second transistor connected in series with said first transistor, said second transistor including source, drain and gate, and said gate and drain of said second transistor being coupled to each other, and the source of said first transistor being coupled to the drain of said second transistor.
7 more elements
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, said circuit comprising:
- a first circuit portion including:
- a metal gate transistor (MGT) having a metal gate, a source coupled to ground, and a drain,
- a first resistor having one end coupled to an input connection for said first circuit portion and another end coupled to the drain and gate of the MGT, and
- a second resistor having one end coupled to an output connection for said first circuit portion and another end coupled to a cathode of a first diode;
- and
- a second circuit portion, having an input coupled to the output of the first circuit portion, said second circuit portion including:
- a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages,
- a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, and
- a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of the bipolar junction transistor, the source of the second transistor being coupled to ground.
6 more elements
An electrostatic discharge protection circuit (EDPC) including:
- a first circuit portion including:
- a resistor coupled to an input pad,
- a first distributed diode having a cathode coupled to the resistor and having an anode coupled to ground and
- a metal gate transistor (MGT) having a drain and a gate, both the drain and gate coupled to the cathode of said first distributed diode;
- and
- a second circuit portion, having an input coupled to an output of the first circuit portion, said second circuit portion including:
- a capacitor coupled to said drain of said MGT and connectable to an external circuit to be protected;
- a first diode having an anode coupled to around and a cathode coupled to the capacitor, for shunting negative electrostatic discharge voltages,
- a bipolar junction transistor, having a collector coupled to the capacitor and an emitter coupled to ground, for shunting positive electrostatic discharge voltages,
- a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of the bipolar junction transistor, the source of the second transistor being coupled to ground.
7 more elements
A protection circuit including:
- a first circuit portion including:
- an input pad connected to a source of analog signals;
- a first distributed n-well resistance coupled to said input pad;
- a metal gate transistor (MGT) having a gate and a drain coupled to said resistance at a portion spaced apart from said input pad;
- and
- a second circuit portion, having an input coupled to an output of the first circuit portion, said second circuit portion including:
- a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages,
- a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages,
- a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of the bipolar junction transistor, the source of the second transistor being coupled to ground.
6 more elements
A charge coupled device (CCD) system, comprising:
- a CCD device for providing an analog voltage output signal;
- a first protection circuit portion comprising:
- a pad,
- a resistor having a first terminal coupled to said pad, and
- a metal gate transistor (MGT) having a drain and a gate, both coupled to a second terminal of said resistor;
- a second protection circuit portion, having an input coupled to an output of the first protection circuit portion, said second protection circuit portion including:
- a capacitor coupled to said first protection circuit portion, and
- an amplifier coupled to said capacitor for amplifying signals provided to said capacitor;
- and
- signal processing circuitry coupled to said amplifier for processing signals amplified by said amplifier;
- wherein said second protection circuit portion further includes:
- a first diode having an anode coupled to ground and a cathode coupled to the input of the second circuit portion, for shunting negative electrostatic discharge voltages,
- a bipolar junction transistor, having a collector coupled to the input of the second circuit portion and an emitter coupled to ground, for shunting positive electrostatic discharge voltages, and
- a second transistor including source, drain, and gate, said gate and drain of said second transistor being coupled to each other and to the base of said bipolar junction transistor, the source of the second transistor being coupled to ground.
11 more elements
A circuit for protecting against electrostatic discharge while allowing high input analog voltage during normal operation, the circuit having first and second inputs, said circuit comprising:
- a first transistor having a gate, a drain, and a source, the gate and drain of the first transistor coupled to the second input of the circuit;
- a second transistor having a gate, a drain, and a source, the gate and drain of the second transistor coupled to the source of the first transistor and the source of the second transistor coupled to ground;
- a bipolar junction transistor having a base, a collector, and an emitter, the base of the bipolar junction transistor coupled to the drain for the first transistor, the emitter of the bipolar junction transistor coupled to ground and the collector of the bipolar junction transistor coupled to the first input.
Dependencies are inferred from the claim text.