Method of forming split-gate flash cell for salicide and self-align contact

A method of forming a split-gate flash cell having salicidated gate and self-aligned contact comprising the steps of:

• providing a semiconductor substrate having active and passive region defined;
• forming a gate oxide layer on said semiconductor substrate;
• forming a first polysilicon layer over said gate oxide layer;
• forming a nitride layer over said first polysilicon layer;
• forming a first photoresist mask having floating gate pattern over said nitride layer;
• etching through said floating gate pattern in said first photoresist mask to form openings in said nitride layer and exposing said first polysilicon layer at the bottom of said openings;
• removing said first photoresist mask;
• oxidizing said exposed first polysilicon layer at the bottom of said openings in said nitride layer to form poly-oxide;
• removing said nitride layer;
• using said poly-oxide as a hard-mask, etching said first polysilicon layer to form a floating gate underlying said poly-oxide layer;
• forming an interpoly oxide layer over said substrate;
• forming a second polysilicon layer over said interpoly oxide layer;
• ion implanting said second polysilicon layer;
• forming an nitride/oxide layer over said second polysilicon layer;
• forming a partial hard photomask over said nitride/oxide layer having open pattern over gate region;
• etching through said open pattern in said partial hard mask to remove portions of said nitride/oxide layer exposed in said open pattern;
• removing said partial hard photomask;
• forming a second photoresist mask having control gate pattern over said second polysilicon layer;
• etching through pattern in said second photoresist mask to form a control gate;
• performing ion implantation to form source region;
• forming nitride spacer;
• performing ion implantation to form drain region;
• depositing a resistor protecting oxide (RPO) layer over said substrate;
• etching said RPO to form openings over gate and contact surfaces of substrate where salicidation is to be performed;
• performing salicidation in said openings;
• forming an interlevel dielectric layer (ILD) over said substrate;
• forming a third photoresist mask having self-aligned contact pattern over said ILD;
• etching through said pattern in said third photoresist mask to form self-aligned contact opening in said ILD layer;
• forming metal in said self-aligned contact openings and performing etch back to complete the forming of said split-gate having salicidated gate and self-aligned contacts.