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US 6,281,110 B1Granted
Method for making an integrated circuit including deutrium annealing of metal interconnect layers
AssigneeLucent Technologies Inc.
InventorsIsik C. Kizilyalli, Sailesh Mansinh Merchant, Pradip Kumar Roy
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Abstract
A method of making an integrated circuit includes forming a plurality of copper interconnect layers adjacent a semiconductor substrate. The plurality of copper interconnect layers are then annealed, in a deuterium ambient, prior to chemical mechanical polishing of such layers. The microstructure of each of the copper interconnect layers is thereby stabilized.
Claims18
A method of making an integrated circuit comprising:
- providing a semiconductor substrate;
- forming a stack of copper interconnect layers adjacent the semiconductor substrate by electrodepositing copper;
- annealing, in a deuterium ambient, each copper interconnect layer after formation thereof to thereby stabilize the microstructure of the copper;
- chemical-mechanical polishing (CMP) each copper interconnect layer after the annealing.
1 more element
A method for making an integrated circuit comprising the steps of:
- providing a semiconductor substrate;
- forming a stack of metal interconnect layers adjacent the semiconductor substrate, at least one of the metal interconnect layers being formed by electrodepositing copper;
- annealing, in a deuterium ambient, the at least one metal interconnect layer comprising copper after formation thereof;
- chemical-mechanical polishing (CMP) the at least one metal interconnect layer comprising copper after the annealing thereof.
1 more element
A method for making an integrated circuit comprising the steps of:
- providing a semiconductor substrate;
- forming a stack of metal interconnect layers adjacent the semiconductor substrate, at least one of the metal interconnect layers being formed by electrodepositing copper;
- annealing, in a deuterium ambient, the at least one metal interconnect layer comprising copper after formation thereof;
- and
- polishing each metal interconnect layer;
- wherein the at least one metal interconnect layer comprising copper is annealed prior to the polishing thereof.
3 more elements
Dependencies are inferred from the claim text.