Method of preventing current leakage around a shallow trench isolation structure
AssigneeUnited Microelectronics Corp.
InventorsSun-Chieh Chien, Chien-Li Kuo, Tzung-Han Lee, Wei-Wu Liao
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Abstract
An ion implantation method useful for fabricating shallow trench isolation structureimplants phosphorus ions instead of arsenic ions into a substrate when the source/drain regions of an NMOS device are doped. Alternatively, low energy ions are used in the ion implantation for forming the source/drain regions of an NMOS device. Consequently lattice dislocations of the crystal structure within a substrate is reduced and unwanted device leakage current is eliminated.
Claims27
A method of forming shallow trench isolation, comprising the steps of:
- providing a substrate;
- forming a pad oxide layer and a mask layer on the substrate;
- forming a trench in the substrate;
- forming an insulation layer over the substrate and filling the trench;
- removing a portion of the insulation layer until the mask layer is exposed;
- and
- performing an ion implantation by implanting phosphorus ions into the substrate around the trench.
A method of forming shallow trench isolation, comprising the steps of:
- providing a substrate;
- forming a pad oxide layer and a mask layer on the substrate;
- forming a trench in the substrate;
- forming an insulation layer over the substrate and filling the trench;
- removing a portion of the insulation layer until the mask layer is exposed;
- performing a low energy ion implantation by implanting ions into the substrate on either side of the trench, whereby the energy being low enough that irreversible destruction of a lattice structure is prevented;
- removing the pad oxide layer;
- and
- forming a gate oxide layer on the substrate.
Dependencies are inferred from the claim text.