Manufacturing process to eliminate ONO fence material in high density NAND-type flash memory devices
AssigneeAdvanced Micro Devices, Inc.
InventorsKent Kuohua Chang, Yuesong He, John Jianshi Wang, Ken Au
Life of this patent
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Abstract
Polystringers that cause NAND-type memory core cells to malfunction are covered by ONO fence material. ONO fence is removed so that polystringers may then be removed more readily. A SiON layer, tungsten silicide layer, second polysilicon layer, ONO dielectric, and first polysilicon layer are successively removed from between NAND-type flash memory core cells leaving ONO fence that shields some first polysilicon layer material from removal. The device is next exposed to an hydrogen-fluoride solution to remove oxide-based materials, particularly ONO fence. Thereafter, the polystringers are exposed and may thus be removed more readily.
Claims24
A method for fabricating a semiconductor device comprising:
- providing a first layer of polysilicon on the surface of a semiconductor substrate;
- protecting selected portions of said first layer of polysilicon and exposing portions of said first layer of polysilicon by providing a masking material over said selected portions;
- removing said exposed portions of said first layer of polysilicon;
- providing a second layer of polysilicon over said surface of said semiconductor substrate;
- anisotropically removing said second layer of polysilicon, so as to form spacers of said second layer of polysilicon adjacent said protected selected portions of said first layer of polysilicon;
- removing said masking material;
- providing a triple layer of oxide-nitride-oxide (ONO) over said first layer of polysilicon and said spacer;
- forming a third layer of polysilicon over said triple layer of oxide-nitride-oxide;
- removing portions of said third layer of polysilicon, said triple layer, said first layer of polysilicon and said spacer between intended locations of memory core cells successively;
- and
- removing ONO material remaining between intended locations of memory core cells.
A method for fabricating a semiconductor device comprising:
- providing a first insulating layer over a semiconductor substrate;
- forming a first conductive layer over said first insulating layer;
- forming a mask over said first conductive layer thereby protecting selected portions of said first conductive layer and exposing remaining portions of said first conductive layer;
- removing exposed remaining portions of said first conductive layer;
- providing a second conductive layer over said semiconductor substrate, including said protected selected portions of said first conductive layer;
- and
- anisotropically removing said second conductive layer so as to form spacers of said second conductive layer adjacent said selected protected portions of said first conductive layer.
Dependencies are inferred from the claim text.