Semiconductor structure having interconnects on a projecting region and substrate
AssigneeMicron Technology, Inc.
InventorsGuy Blalock, Scott Meikle, Sung Kim, Kirk Prall
Life of this patent
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Abstract
A region is formed in a semiconductor substrate and extends beyond the substrate surface. First and second interconnects each having a predetermined thickness and a surface approximately parallel to the substrate surface are formed on the region. The first and second interconnects define a trench therebetween. A third interconnect is formed on the substrate. The thicknesses of the first and second interconnects are reduced a first amount to improve the aspect ratio of the trench, to improve the cross-sectional profile of the trench, or both. The thickness of the third strip is reduced a second amount. The second amount may be smaller than the first amount.
Claims10
A semiconductor structure, comprising:
- a semiconductor substrate having a surface;
- an isolation region formed in the substrate and having a surface projecting out from the surface of the substrate;
- first and second interconnects formed on the surface of the isolation region, the first and second interconnects having first and second heights, respectively, with respect to the surface of the substrate;
- a trench having an upper and lower width and a height defined by the first and second interconnects;
- and
- a third interconnect formed on the surface of the substrate and having a third height with respect to the surface of the substrate, the first, second, and third heights are substantially equal,
- wherein the first, second and third interconnects are formed from a polysilicon layer and an insulative layer formed over the polysilicon layer, the insulative layer of the third interconnect having a greater thickness than the insulative layer of the first and second interconnects, and the polysilicon layers of the first, second, and third interconnects having thicknesses that are substantially equal.
A semiconductor structure in a semiconductor memory device, comprising:
- a semiconductor substrate having a surface;
- an oxide isolation region formed in the substrate and having a surface at a height with respect to the surface of the substrate;
- first and second interconnects having first and second thicknesses, respectively, formed on the surface of the isolation region and defining a non-retrograde trench therebetween, the first and second interconnects having first and second heights, respectively, with respect to the surface of the substrate;
- and
- a third interconnect having a third thickness formed on the surface of the substrate and having a third height with respect to the surface of the substrate, the third thickness greater than the first and second thicknesses and the first, second, and third heights substantially equal.
Dependencies are inferred from the claim text.