Etching method for doped polysilicon layer
AssigneeUnited Microelectronics Corp.
InventorChi-Kuo Hsieh
Life of this patent
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Abstract
A method for etching a doped polysilicon layer. A first doped polysilicon layer of a first conductive type and a second doped polysilicon layer of a second conductive type are formed. An etching process is performed to pattern the first doped polysilicon layer and the second doped polysilicon layer. The etching process includes a first main etching step and a second main etching step. The etching pressure of the first main etching step is lower than the etching pressure of the second main etching step.
Claims26
An etching method for a doped polysilicon layer, wherein the doped polysilicon layer comprises a first doped polysilicon layer of a first conductive type and a second doped polysilicon layer of a second conductive type, comprising the steps of:
- performing a first main etching step with a first pressure on the first doped polysilicon layer and the second doped polysilicon layer, so as to leave a first remaining doped polysilicon layer and a second remaining doped polysilicon layer;
- and
- performing a second main etching step with a second pressure on the first remaining doped polysilicon layer and the second remaining doped polysilicon layer, wherein the second pressure is different from the first pressure.
A method of fabricating a dual gate, comprising the steps of:
- forming a gate oxide layer on a substrate;
- forming a doped polysilicon layer on the gate oxide layer, wherein the doped polysilicon layer comprises a first doped polysilicon layer of a first conductive type and a second doped polysilicon layer of a second conductive type;
- performing a first main etching step with a first pressure on the first doped polysilicon layer and the second doped polysilicon layer, so as to result in a first remaining doped polysilicon layer and a second remaining doped polysilicon layer;
- and
- performing a second main etching step with a second pressure on the first remaining doped polysilicon layer and the second remaining doped polysilicon layer to form a first doped polysilicon gate and a second doped polysilicon gate, wherein the second pressure is different from the first pressure.
Dependencies are inferred from the claim text.