Method of forming a silicide region in a Si substrate and a device having same

A method of forming a MISFET device in a Si substrate having upper and lower surfaces and first and second silicide regions, comprising the steps of:

• a) forming spaced apart shallow trench isolations in the Si substrate;
• b) forming, atop the upper surface of the Si substrate and between said shallow trench isolations, a gate having sides;
• c) performing a first amorphization and doping of first and second portions of the Si substrate adjacent said gate to form first and second extension regions to a first predetermined depth from the upper surface;
• d) forming sidewall spacers adjacent said sides of said gate;
• e) performing a second amorphization and doping of the substrate beneath a portion of said first and second extensions adjacent said sidewall spacers thereby forming deep drain and deep source regions having a predetermined depth from the upper surface, and thereby forming first and second amorphous-crystalline interfaces within the Si substrate;
• f) depositing a metal layer atop the upper surface of the Si substrate over said deep drain and deep source regions;
• g) performing backside irradiation with a first radiation beam incident the lower surface of the Si substrate to initiate XRC at said first and second amorphous-crystalline interfaces such that heat is provided to said deep drain and deep source regions and said metal layer so as to initiate diffusion of metal in said metal layer into said first and second extension regions, respectively, thereby forming the first and second silicide regions in said first and second extension regions;
• and
• h) removing said metal layer.