Method of making contactless nonvolatile semiconductor memory device having buried bit lines surrounded by grooved insulators

A method for manufacturing a contactless nonvolatile semiconductor memory device, comprising the steps of:

• preparing a semiconductor substrate of a first conductivity type;
• perforating a plurality of grooves of a rectangular shape in said semiconductor substrate;
• forming a first gate insulating layer on said semiconductor substrate at said grooves;
• forming a first conductive layer on said first gate insulating layer;
• patterning said first conductive layer to form first rectangular conductive layers over said grooves;
• implanting impurity ions of a second conductivity type into said semiconductor substrate by using said first rectangular conductive layers as a mask to form rectangular impurity diffusion layers as sub bit lines;
• forming a plurality of rectangular insulating layers on said rectangular impurity diffusion layers;
• forming a second gate insulating layer on said rectangular conductive layers;
• forming a second conductive layer on said second gate insulating layer;
• patterning said second conductive layer to form second rectangular conductive layers as word lines perpendicular to said sub bit lines;
• and
• etching said first rectangular conductive layers by a dry etching process using said word lines as a mask, to form floating gate electrodes.

A method for manufacturing a contactless nonvolatile semiconductor memory device, comprising the steps of:

• preparing a semiconductor substrate of a first conductivity type;
• forming first and second isolation insulating layers of a rectangular shape on said semiconductor substrate by an LOCOS process;
• implanting impurity ions of a second conductivity type into said semiconductor substrate to form an impurity diffusion layer on said semiconductor substrate after said first and second isolation insulating layers are formed;
• forming a plurality of first insulating layers of a rectangular shape on said impurity diffusion layer and said first and second isolation insulating layers;
• etching said impurity diffusion layer by using said first insulating layers as a mask to form rectangular impurity diffusion layers as a first sub bit line, a sub source line and a second sub bit line between said first and second isolation insulating layers;
• etching said semiconductor substrate by using said first insulating layers as a mask to form rectangular grooves in said semiconductor substrate;
• forming a first gate insulating layer on said semiconductor substrate at said grooves;
• forming a first conductive layer on said first gate insulating layer;
• patterning said first conductive layer to form first rectangular conductive layers over said grooves;
• forming a second gate insulating layer on said rectangular conductive layers;
• forming a second conductive layer on said second gate insulating layer;
• patterning said second conductive layer to form second rectangular conductive layers as word lines perpendicular to said sub bit lines;
• and
• etching said first rectangular conductive layers by a dry etching process using said word lines as a mask, to form floating gate electrodes.

A method for manufacturing a contactless nonvolatile semiconductor memory device, comprising the steps of:

• preparing a semiconductor substrate of a first conductivity type;
• forming first and second isolation insulating layers of a rectangular shape on said semiconductor substrate by a LOCOS process;
• perforating a plurality of grooves of a rectangular shape in said semiconductor substrate between said first and second isolation insulating layers;
• forming a first gate insulating layer on said semiconductor substrate at said grooves;
• forming a first conductive layer on said first gate insulating layer;
• patterning said first conductive layer to form first rectangular conductive layers over said grooves;
• implanting impurity ions of a second conductivity type into said semiconductor substrate by using said first rectangular conductive layers as a mask to form rectangular impurity diffusion layers as a first sub bit line, a sub source line and a second sub bit line between said first arid second isolation insulating layers;
• forming a plurality of rectangular insulating layers on said rectangular impurity diffusion layers;
• forming a second gate insulating layer on said rectangular conductive layers;
• forming a second conductive layer on said second gale insulating layer;
• patterning said second conductive layer to form second rectangular conductive layers as word lines perpendicular to said sub bit lines;
• and
• etching said first rectangular conductive layers by a dry etching process using said word lines as a mask, to form floating gate electrodes.

A method for manufacturing a contactless nonvolatile semiconductor memory device, comprising the steps of:

• preparing a semiconductor substrate of a first conductivity type;
• implanting impurity ions of a second conductivity type into said semiconductor substrate to form an impurity diffusion layer on said semiconductor substrate;
• forming a plurality of first insulating layers of a rectangular shape on said impurity diffusion layer;
• etching said impurity diffusion layer by using said first insulating layers as a mask to form rectangular impurity diffusion layers as sub bit lines;
• etching said semiconductor substrate by using said first insulating layers as a mask to form rectangular grooves in said semiconductor substrate;
• forming an insulating layer on said semiconductor substrate at said grooves;
• patterning said insulating layer to form isolation insulating layers;
• forming a first gate insulating layer on said semiconductor substrate at said grooves and said rectangular impurity diffusion layers;
• forming a first conductive layer on said first gate insulating layer;
• patterning said first conductive layer to form first rectangular conductive layers over said grooves;
• forming a second gate insulating layer on said rectangular conductive layers;
• forming a second conductive layer on said second gate insulating layer;
• patterning said second conductive layer to form second rectangular conductive layers as word lines perpendicular to said sub bit lines;
• and
• etching said first;
• rectangular conductive layers by a dry etching process using said word lines as a mask, to form floating gate electrodes.