Junction field effect transistor or JFET with a well which has graded doping directly beneath the gate electrode

A JFET transistor comprising:

• a semiconductor substrate,
• a channel well region of a first conductive type formed in the substrate,
• source and drain electrode regions of the first conductive type which are arranged in a mutually spaced relationship in the channel well region,
• an embedment well region of a second conductive type opposite the first conductive type wherein the embedment well region is diffused into the substrate by thermal induction and is arranged around the channel well region and therebelow,
• a gate electrode region of the second conductive type extending between the source and drain electrode regions through the channel well region into the embedment well region, wherein below the gate electrode region, a channel region is formed within the channel well region, with the cross section of said channel region being controllable by means of space-charge zones formed in the transition regions between the gate electrode region and the channel well region,
• wherein below the gate electrode region, a plurality of partial regions of the second conductive type are arranged next to each other in the direction of the extension of the gate electrode region and in a mutually spaced relationship, said partial regions bordering on the gate electrode region and extending through the channel well region into the embedment well region.