Process for a nail shaped landing pad plug

A method of fabricating of a nail shaped plug of a semiconductor device, comprising the steps of:

• a) forming a gate and an overlying gate dielectric layer over a semiconductor structure;
• forming a first insulating layer over said gate dielectric layer;
• said first insulating layer composed of TEOS oxide, and has a thickness in a range of between about 1000 and 20,000 Å;
• planarizing said first dielectric layer;
• b) forming a second insulating layer on said first insulating layer;
• said second insulating layer is composed of PSG;
• said second insulating layer has a thickness less than 0.3 μm;
• then
• c) forming a first photoresist layer on said second insulating layer;
• said first photoresist layer having a first photoresist opening over said contact area;
• said first photoresist opening has an open dimension in a range of between about 0.15 and 0.5 μm;
• then
• d) etching said second insulating layer to form a disk shaped opening;
• said disk shaped opening having flat bottom comprised of said first insulating layer;
• said disk shaped opening having sidewalls;
• the etch is an isotropic etch having an etch selectivity between said second insulating layer and said first insulating layer in a range of between about 2:1 and 20:1;
• the isotropic etch of said second insulating layer comprising buffered oxide etch and the isotropic etch removing a horizontal width of said second insulating layer in a range of between about 0.05 and 0.3 μm;
• then
• e) etching said gate dielectric layer and said first insulating layer to form a lower opening;
• the etch using a dry etch to expose the top surface of said semiconductor structure;
• a nail shaped contact hole comprised of (a) said disk shaped opening and (b) said lower opening;
• said lower opening having straight sidewalls;
• f) removing said first photoresist layer;
• then
• g) depositing a conductive layer filling said nail shaped contact hole and overlying said second insulating layer;
• said conductive layer is composed of a material selected from the group consisting of polysilicon, W, Al and Ti/TiN, and said conductive layer has a thickness in a range of between about 1000 and 10,000 Å;
• and
• h) etching back said conductive layer thereby forming a nail shaped conductive plug.

A method of fabricating a nail shaped plug of a semiconductor device, comprising the steps of:

• a) providing a metal layer over a semiconductor structure;
• forming a first insulating layer over said metal layer and said semiconductor structure;
• b) forming a second insulating layer on said first insulating layer;
• said second insulating layer is composed of PSG;
• then
• c) forming a first photoresist layer on said second insulating layer;
• said first photoresist layer having a first photorestist opening over a contact area;
• then
• d) etching said second insulating layer using an isotropic etch forming a disk shaped opening, said disk shaped opening having flat bottom comprised of said first insulating layer;
• said disk shaped opening having sidewalls;
• the isotropic etch having an etch selectivity between said about 2:1 and 20:1;
• then
• e) etching said first insulation layer to form a lower opening;
• the etch using a anisotropic etch to expose the surface of said metal layer forming a nail shaped contact hole is comprised of (a) said disk shaped opening and (b) said lower opening;
• said lower opening having straight sidewalls;
• then
• f) removing said first photoresist layer;
• then
• g) depositing a conductive layer filling said nail shaped contact hole and overlying said second insulating layer;
• and
• h) planarizing said conductive layer thereby forming a nail shaped conductive plug.

A method of fabricating a nail shaped plug of a semiconductor device, comprising the steps of:

• a) forming a first insulating layer over a semiconductor structure;
• b) planarizing said first insulating layer;
• c) forming a second insulating layer on said first insulating layer;
• said second insulating layer is composed of PSG;
• d) forming a first photoresist layer on said second insulating layer;
• said first photoresist layer having a first photoresist opening over said contact area;
• then
• e) etching said second insulating layer using an isotropic etch forming a disk shaped opening, said disk shaped opening having flat bottom comprised of said first insulating layer;
• said disk shaped opening having vertical sidewalls;
• then
• f) etching said first insulating layer using a anisotropic etch to expose the surface of said semiconductor structure to form a lower opening;
• said lower opening and said disk shape opening comprise a nail shaped contact hole;
• then
• g) removing said first photoresist layer;
• h) depositing a conductive layer filling said nail shaped contact hole and overlying said second insulating layer;
• and
• i) planarizing said conductive layer thereby forming a first nail shaped conductive plug;
• j) forming a third insulating layer on said first nail shaped conductive plug and said second insulating layer;
• k) forming a fourth insulating layer on said third insulating layer;
• said fourth insulating layer composed of PSG;
• l) forming a second photoresist layer on said fourth insulating layer;
• said second photoresist layer having a second photoresist opening over said first nail shaped conductive plug;
• then
• m) etching said fourth insulating layer using an isotropic etch forming a second disk shaped opening, said second disk shaped opening having flat bottom comprised of the planarized said first insulating layer;
• said second disk shaped opening has sidewalls;
• then
• n) etching said third insulating layer using an anisotropic etch to expose the surface of said first nail shaped conductive plug forming a second lower opening;
• a second nail shaped contact hole is comprised of said second lower opening and said second disk shaped opening;
• said second lower opening have flat sidewalls;
• then
• o) removing said second photoresist layer;
• then
• p) depositing a second conductive layer filling said second nail shaped contact hole and overlying said fourth insulating layer;
• and
• q) planarizing said second conductive layer thereby forming a second nail shaped conductive plug.