Method of forming multiple wells in a semiconductor integrated circuit using fewer photolithography steps
AssigneeSamsung Electronics Co., Ltd.
InventorsJoon-mo Kwon, Sung-young Lee
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AssigneeSamsung Electronics Co., Ltd.
InventorsJoon-mo Kwon, Sung-young Lee
Estimating the term…
A method is provided for forming a multiple well of a semiconductor device is provided. By this method, a pocket well region of a first conductivity type is formed over a predetermined first region of a semiconductor substrate of a first conductivity type, using a first photolithography process. A first deep well region of a second conductivity type is then formed under the pocket well region in a self-aligned manner. A peripheral well region of the first conductivity type is selectively formed in a predetermined second region of the semiconductor substrate apart from the pocket well region, using a second photolithography process. An ion-implantation mask covering the pocket well region and the peripheral well region of the first conductivity type is formed using a third photolithography process, and is used to form a peripheral well region of the second conductivity type and a second deep well region of the second conductivity type in a self-aligned manner under the peripheral well region of the second conductivity type, in the exposed areas of the semiconductor substrate. In this way, a triple well region is formed using only three photolithography processes.
A method for forming a multiple well of a semiconductor device, comprising:
A method for forming a triple well of a semiconductor device, comprising:
Dependencies are inferred from the claim text.