Non-volatile storage latch
AssigneeHoneywell Inc.
InventorsAllan T. Hurst, Jr., Jeff S. Sather, Jason B. Gadbois
Life of this patent
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Abstract
In one aspect of the present invention, a non-volatile latching element is provided that includes one or more magnetic elements therein. By programming the magnetic elements to appropriate resistance values, the latching element assumes a pre-programmed state upon power up. The magnetic elements are preferably programmed using either a one or two layer word line. In another aspect of the present invention, the magnetic elements are formed as pseudo-spin valve structures utilizing only CoFe as the active ferromagnetic layers, with one ferromagnetic layer thinner than the other. This simplifies the design while maintaining the high moment material to achieve large GMR ratios.
Claims24
A non-volatile latch, comprising:
- a latching element powered by a power supply, said latching element selectively storing a bit of data having one of two stable states;
- and
- first magnetic means interposed between a first portion of said latching element and said power supply for providing a first magnetically programmable resistance therein, said first magnetic means causing said latching element to assume a desired one of the two stable states upon power-up of said power supply.
A non-volatile latch powered by a first voltage and a second voltage, comprising:
- a first p-channel transistor having a gate terminal, a source terminal and a drain terminal, said source terminal of said first p-channel transistor connected to the first voltage;
- a first n-channel transistor having a gate terminal, a source terminal and a drain terminal, said drain terminal of said first n-channel transistor connected to said drain terminal of said first p-channel transistor, and said gate terminal of said first n-channel transistor connected to said gate terminal of said first p-channel transistor;
- a second p-channel transistor having a gate terminal, a source terminal and a drain terminal, said source terminal of said second p-channel transistor connected to the first voltage;
- a second n-channel transistor having a gate terminal, a source terminal and a drain terminal, said drain terminal of said second n-channel transistor connected to said drain terminal of said second p-channel transistor, and said gate terminal of said second n-channel transistor connected to said gate terminal of said second p-channel transistor;
- said drain terminal of said first n-channel transistor connected to said gate terminal of said second n-channel transistor, and said drain terminal of said second n-channel transistor connected to said gate terminal of said first n-channel transistor, and
- a first magnetic means for providing a first magnetically programmable resistance value connected between the source of the first n-channel transistor and the second voltage.
Dependencies are inferred from the claim text.