Dynamic buffer allocation for a computer system
AssigneeMicron Technology, Inc.
InventorJeffrey Jay Rooney
Life of this patent
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Abstract
A method for dynamically allocating buffers between components in a computer system is described. Matched sets of bidirectional buffers are used to control data flow between the processor and the computer bus. The dynamic buffer allocation system allows simultaneous data transfer from the processor to the buffers, and from the buffers to the computer bus.
Claims13
In a computer system, a method for concurrently transferring data between a processor and a plurality of peripheral devices via a dynamic buffer allocation system comprising a plurality of address buffers and a plurality of data buffers, wherein each of said plurality of address buffers is exclusively associated with one of said plurality of data buffers, the method comprising the acts of:
- latching a processor write request comprising an address location in a first peripheral device into a first address buffer of the dynamic buffer allocation system;
- latching a processor read request comprising an address location to be read from a second peripheral device into a second address buffer of the dynamic buffer allocation system;
- sending said processor read request from said second address buffer to said second peripheral device;
- and
- concurrently transferring data from said processor to a first data buffer of the dynamic buffer allocation system associated with said first address buffer and from said second peripheral device to a second data buffer of the dynamic buffer allocation system associated with said second address buffer.
In a computer system, a method for concurrently transferring data between a processor and a peripheral device, comprising the acts of:
- transferring a first address from a processor to a first buffer;
- transferring said first address to a peripheral device;
- transferring data from said peripheral device to a second buffer in response to said first address, said second buffer being matched with said first buffer;
- and
- transferring said data from said second buffer to said processor while a second address is transferred from said processor to said first buffer,
- wherein said first buffer, and said second buffer, are part of a dynamic buffer allocation system.
Dependencies are inferred from the claim text.