Double coding mask read only memory (mask ROM) for minimizing band-to-band leakage
AssigneeTexas Instruments - Acer Incorporated
InventorShye-Lin Wu
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AssigneeTexas Instruments - Acer Incorporated
InventorShye-Lin Wu
Estimating the term…
The present invention provides a mask ROM memory to minimize band-to-band leakage. The substrate includes a normal NMOS device region and a NMOS cell region for coding. An isolation region is formed between the normal NMOS device region and the NMOS cell region. A gate oxide layer is formed on the normal NMOS device region and a coding oxide layer is formed on the NMOS cell region, respectively. In the preferred embodiments, the coding oxide layer has a thickness of about two to ten times that of the gate oxide layer. Main gates are respectively formed on the gate oxide layer and the coding oxide layer. In the present invention, the main gates comprise materials like metal and metal compounds. Spacers are formed on the side walls of the main gates. First doped regions of source and drain regions, or namely lightly doped drains (LDD) and sources, are formed under the spacers and are adjacent to the main gates. Second doped regions of the source and drain regions are formed next to and outside the first doped regions. The second doped regions have a heavier dose than the first doped regions. A p type doped region is formed under the coding oxide layer and adjacent to a surface of the NMOS cell region. The p type doped region is doped with dopants like aluminum-containing, gallium-containing, indium-containing, or thallium-containing dopants. The p type doped region has higher resistance than the other normal NMOS devices during the operation.
A mask ROM (mask read only memory) device on a substrate having a NMOS device region and a NMOS cell region for coding, said mask ROM comprising:
A mask ROM (mask read only memory) device on a substrate having a NMOS device region and a NMOS cell region for coding, said mask ROM comprising:
Dependencies are inferred from the claim text.