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US 6,207,560 B1Granted
Method for manufacturing thin-film resistor
AssigneeUnited Microelectronics Corp.
InventorJia-Sheng Lee
Life of this patent
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Abstract
A dual damascene method is described for manufacturing a multilevel metal interconnect with a thin film resistor. A substrate is provided. An insulating layer is formed on the substrate. A dual damascene structure is formed in the insulating layer. A thin film resistor layer is formed over the substrate and the thin film resistor layer is patterned to form a thin film resistor.
Claims11
A dual damascene method for manufacturing a multilevel metal interconnect with a thin film resistor, comprising the steps of:
- providing a substrate;
- forming an insulating layer on the substrate;
- forming a dual damascene structure in the insulating layer;
- forming a thin film resistor layer over the substrate;
- and
- patterning the thin film resistor layer to form a thin film resistor.
3 more elements
Dependencies are inferred from the claim text.