Isolation collar nitride liner for DRAM process improvement
AssigneeInfineon Technologies AG
InventorsChristoff Graimann, Angelika Schulz, Carlos A. Mazure, Christian Dieseldorff
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Abstract
A method of fabricating a trench cell capacitor can be used in the formation of a DRAM cell. In one embodiment, a trench is formed within a semiconductor substrate. The trench is lined with a dielectric layer, e.g., an ONO layer. After lining the trench, a collar is formed in an upper portion of the trench by forming an oxide layer in the upper portion. A nitride layer on the oxide layer. The trench is then filled with semiconductor material. For example, a semiconductor region can be epitaxially grown to fill the trench.
Claims34
A method of fabricating a trench cell capacitor within a semiconductor body, the method comprising:
- forming a trench within a semiconductor substrate, wherein the trench comprises upper and lower portions;
- lining the trench with a dielectric layer;
- after lining the trench, forming a collar in an upper portion of the trench by forming an oxide layer in the upper portion of the trench and a silicon nitride layer on the oxide layer;
- and
- filling said trench with conductive material to substantially fill said trench, the silicon nitride layer and oxide layer of the collar electrically isolating the conductive material from a sidewall portion of the trench.
A method of fabricating a trench cell capacitor within a semiconductor body, the method comprising:
- forming a trench within a semiconductor substrate, wherein the trench comprises upper and lower portions;
- forming a dielectric layer upon a surface of both the upper and lower portions of the trench;
- filling the lower portion of the trench with a conductive material;
- forming a collar in the upper portion of the trench, the collar comprising an oxide layer and a silicon nitride layer;
- and
- without removing the silicon nitride layer, filling the upper portion of the trench with a conductive material.
A method of forming a trench capacitor, the method comprising:
- forming a trench in a semiconductor region, the trench including upper and lower portions;
- lining the upper and lower portions of the trench with a dielectric material;
- filling the lower portion of the trench with a conductive material;
- forming an oxide layer over the semiconductor region, surfaces of the dielectric layer on the upper portion of the trench and exposed portions of the conductive material in the lower portion of the trench;
- anisotropically etching the oxide layer to remove portions of the oxide layer over the semiconductor region and over the conductive material in the lower portion of the trench;
- forming a silicon nitride layer over the semiconductor region, the oxide layer on the upper portion of the trench, and exposed portions of the conductive material in the lower portion of the trench;
- anisotropically etching the silicon nitride layer to remove portions of the silicon nitride layer over the semiconductor region and over the conductive material in the lower portion of the trench;
- and
- filling the upper portion of the trench with a conductive material.
In a process for fabricating a trench cell capacitor having a trench penetrating a doped buried layer within a semiconductor body, said doped buried layer forming a first plate of said capacitor, said trench having a lower portion filled with doped semiconductor material to partially form a second plate of said capacitor, and a peripheral dielectric layer separating said first capacitor plate and said second partially formed capacitor plate, the improvement therewith comprising the steps of:
- forming an isolation collar in a top portion of said trench, said isolation collar comprising a layer of silicon nitride deposited over a layer of oxide;
- and
- filling said top portion of said trench in a region surrounded by said silicon nitride and oxide isolation collar with a conductive material.
A process for fabricating a trench cell capacitor within a silicon substrate, comprising the steps of:
- forming a doped buried layer within said silicon substrate to provide a first plate of said capacitor;
- forming a trench within said silicon substrate to a depth level penetrating the buried layer;
- depositing a dielectric layer peripherally within said trench;
- filling a lower portion of said trench with doped polysilicon to partially form a second plate of said capacitor, wherein said first plate and second partially formed plate are separated by said dielectric layer;
- forming an isolation collar peripherally within an upper portion of said trench, said isolation collar comprising a layer of silicon nitride deposited over a layer of oxide;
- and
- forming polysilicon material over said silicon nitride and oxide isolation collar, said polysilicon completing said second plate of said capacitor.
Dependencies are inferred from the claim text.