Semiconductor device and manufacturing method thereof
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsShigenobu Maeda, Yuuichi Hirano
Life of this patent
Estimating the term…
Loading patent…
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsShigenobu Maeda, Yuuichi Hirano
Estimating the term…
Provided is a semiconductor device with a silicide protection structure that prevents the over-etching of a source/drain layer in forming a contact hole and prevents a voltage drop in surge voltage without increasing the area of the source/drain layer, as well as a manufacturing method of the device. There is defined an active region (AR) of an MOS transistor and a gate electrode (10) that constitutes a field-shield isolation structure is formed in a rectangular loop shape. Over the FS gate electrode (10) and the active region (AR), a gate electrode (20) of the MOS transistor is formed so as to divide the FS gate electrode (10) into two. Each of active regions (AR) facing with each other across the gate electrode (20) has a silicide protection structure (PS1), whose surrounding is an S/D layer (30), and a silicide film (SF1) is formed over the structure (PS1).
A semiconductor device, comprising:
A semiconductor device, comprising:
A semiconductor device, comprising:
Dependencies are inferred from the claim text.